Inventor
Barry E. Huntley
Inventor
Hillsboro, OR, US
Overview
Patents· 71 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing77%
H04LTransmission of digital information, e.g. telegraphic communication16%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
H04WWireless communication networks2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications1%
PatentTitleYear
11,099,878Scalable virtual machine operation inside trust domains within the trust domain architecture202111,050,751Onboarding and accounting of devices into an HPC fabric202111,036,850Technologies for object-oriented memory management with extended segmentation202111,029,937Technologies for performing energy efficient software distribution202111,029,952Hardware apparatuses and methods to switch shadow stack pointers202111,019,061Protecting supervisor mode information202110,999,284Protecting supervisor mode information202110,901,772Virtualization exceptions202110,860,709Encoded inline capabilities202010,810,321Secure public cloud202010,776,283Techniques to provide a secure system management mode202010,713,177Defining virtualized page attributes based on guest page attributes202010,713,195Interrupts between virtual machines202010,705,976Scalable processor-assisted guest physical address translation202010,678,575Instruction-set support for invocation of VMM-configured services without VMM intervention202010,671,737Cryptographic memory ownership table for secure public cloud202010,657,071System, apparatus and method for page granular, software controlled multiple key memory encryption202010,649,911Supporting memory paging in virtualized systems using trust domains202010,628,612Secure public cloud with protected guest-verified host control202010,599,455Virtualization event processing in a layered virtualization architecture202010,592,421Instructions and logic to provide advanced paging capabilities for secure enclave page caches202010,552,168Dynamic microsystem reconfiguration with collaborative verification202010,545,883Verification bit for one-way encrypted memory202010,528,746System, apparatus and method for trusted channel creation using execute-only code202010,515,023System for address mapping and translation protection201910,503,662Systems, apparatuses, and methods for implementing temporary escalated privilege201910,503,664Virtual machine manager for address mapping and translation protection201910,452,423Method and apparatus for light-weight virtualization contexts201910,430,580Processor extensions to protect stacks during ring transitions201910,409,597Memory management in secure enclaves201910,394,556Hardware apparatuses and methods to switch shadow stack pointers201910,394,595Method to manage guest address space trusted by virtual machine monitor201910,341,348Onboarding and accounting of devices into an HPC fabric201910,303,456Technologies for performing energy efficient software distribution201910,303,899Secure public cloud with protected guest-verified host control201910,296,366Virtualization exceptions201910,248,786Platform security using processor assists201910,157,277Technologies for object-oriented memory management with extended segmentation201810,135,825Protecting supervisor mode information201810,042,571Techniques to provide run-time protections using immutable regions of memory201810,002,012Virtualization event processing in a layered virtualization architecture20189,990,197Memory management in secure enclaves20189,946,566Method and apparatus for light-weight virtualization contexts20189,858,411'Execution profiling mechanism'20189,804,870'Instruction-set support for invocation of VMM-configured services without VMM intervention'20179,804,871'Instruction-set support for invocation of VMM-configured services without VMM intervention'20179,792,222'Validating virtual address translation by virtual machine monitor utilizing address validation structure to validate tentative guest physical address and aborting based on flag in extended page table requiring an expected guest physical address in the address validation structure'20179,785,485'Virtualization event processing in a layered virtualization architecture'20179,766,889'Memory management in secure enclaves'20179,747,102'Memory management in secure enclaves'20179,703,703'Control of entry into protected memory views'20179,690,704'Paging in secure enclaves'20179,665,373'Protecting confidential data with transactional processing in execute-only memory'20179,563,455'Virtualization exceptions'20179,537,738'Reporting platform information using a secure agent'20179,501,637'Hardware shadow stack support for legacy guests'20169,430,384'Instructions and logic to provide advanced paging capabilities for secure enclave page caches'20169,405,565'Virtualization event processing in a layered virtualization architecuture'20169,405,937'Method and apparatus for securing a dynamic binary translation system'20169,405,551'Creating an isolated execution environment in a co-designed processor'20169,335,943'Method and apparatus for fine grain memory protection'20169,323,686'Paging in secure enclaves'20169,276,750'Secure processing environment measurement and attestation'20169,235,434'Virtualization event processing in a layered virtualization architecture'20168,997,099'Virtualization event processing in a layered virtualization architecture'20158,813,077'Virtualization event processing in a layered virtualization architecture'20148,291,410'Controlling virtual machines based on activity state'20128,271,978'Virtualization event processing in a layered virtualization architecture'20128,151,264'Injecting virtualization events in a layered virtualization architecture'20127,975,267'Virtual interrupt processing in a layered virtualization architecture'20117,900,204'Interrupt processing in a layered virtualization architecture'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2019Patents assigned to HUNTLEY BARRY E (11)· patent assignee history
2011–2019Patents assigned to NEIGER GILBERT (11)· patent assignee history
2011–2019Patents assigned to ANDERSON ANDREW V (8)· patent assignee history
2011–2017Patents assigned to BENNETT STEVEN M (7)· patent assignee history
2011–2021Based in Hillsboro, OR, US· patent location history
2012–2021Patents assigned to INTEL CORP (69)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 69 | 2012–2021 |
| HUNTLEY BARRY Eself | 11 | 2011–2019 |
| NEIGER GILBERT | 11 | 2011–2019 |
| ANDERSON ANDREW V | 8 | 2011–2019 |
| BENNETT STEVEN M | 7 | 2011–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hillsboro, OR, US | 71 | 2011–2021 |