Inventor
Monte Mar
Inventor
Issaquah, WA, US
Overview
Patents· 55 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique23%
G06FElectric digital data processing19%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner11%
G06GAnalogue computers9%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses8%
H03FAmplifiers5%
G01RMeasuring electric variables4%
H03HImpedance networks, e.g. resonant circuits4%
H03MCoding4%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
PatentTitleYear
11,105,851Combined analog architecture and functionality in a mixed-signal array202110,725,954Microcontroller programmable system on a chip202010,634,722Combined analog architecture and functionality in a mixed-signal array202010,345,377Combined analog architecture and functionality in a mixed-signal array201910,261,932Microcontroller programmable system on a chip201910,248,604Microcontroller programmable system on a chip201910,020,810PSoC architecture201810,007,636Microcontroller programmable system on a chip20189,998,105Programmable switched capacitor block20189,952,282Combined analog architecture and functionality in a mixed-signal array20189,954,528PSoC architecture20189,948,286Programmable switched capacitor block20189,880,536'Autonomous control in a programmable system'20189,843,327'PSOC architecture'20179,831,864Programmable switched capacitor block20179,448,964'Autonomous control in a programmable system'20169,143,134'Combined analog architecture and functionality in a mixed-signal array'20158,941,410'Programmable buffer circuit'20158,736,303'PSOC architecture'20148,543,628'Method and system of digital signal processing'20138,487,655'Combined analog architecture and functionality in a mixed-signal array'20138,358,150'Programmable microcontroller architecture(mixed analog/digital)'20138,299,850'Device with reconfigurable continuous and discrete time functionality'20128,284,084'Microprocessor controlled on-chip programmable reference selection for data converters'20128,149,048'Apparatus and method for programmable power management in a programmable analog circuit block'20128,111,097'Device with reconfigurable continuous and discrete time functionality'20128,092,083'Temperature sensor with digital bandgap'20128,063,665'Programmable buffer circuit'20118,040,266'Programmable sigma-delta analog-to-digital converter'20117,825,688'Programmable microcontroller architecture(mixed analog/digital)'20107,221,187'Programmable microcontroller architecture (mixed analog/digital)'20077,149,316'Microcontroller having an on-chip high gain amplifier'20067,092,980'Programming architecture for a programmable analog system'20066,981,090'Multiple use of microcontroller pad'20056,950,954'Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies'20056,941,336'Programmable analog system architecture'20056,910,126'Programming methodology and architecture for a programmable analog system'20056,798,299'Crystal-less oscillator circuit with trimmable analog current control for increased stability'20046,753,739'Programmable oscillator scheme'20046,724,220'Programmable microcontroller architecture (mixed analog/digital)'20046,608,472'Band-gap reference circuit for providing an accurate reference voltage compensated for process state, process variations and temperature'20036,563,391'Precision crystal oscillator circuit used in microcontroller'20036,525,593'Method and apparatus for local and global power management in a programmable analog circuit'20036,515,551'Programmable oscillator scheme'20036,466,072'Integrated circuitry for display generation'20026,373,306'Clock generator with programmable two-tone modulation for EMI reduction'20026,294,962'Circuit(s), architecture and method(s) for operating and/or tuning a ring oscillator'20016,191,660'Programmable oscillator scheme'20016,175,259'Clock generator with programmable two-tone modulation for EMI reduction'20016,114,914'Fractional synthesis scheme for generating periodic signals'20005,900,752'Circuit and method for deskewing variable supply signal paths'19995,892,383'Parallel voltage controlled resistance elements'19995,822,387'Apparatus for fast phase-locked loop (PLL) frequency slewing during power on'19985,724,007'Adjustable lock detector for a phase-locked loop circuit'19985,532,636'Source-switched charge pump circuit'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996Based in Beverton, OR, US· patent location history
1998–2021Patents assigned to CYPRESS SEMICONDUCTOR CORP (47)· patent assignee history
1998–2021Based in Issaquah, WA, US· patent location history
1999Based in Beaverton, OR, US· patent location history
2011–2016Patents assigned to MAR MONTE (12)· patent assignee history
2011–2016Patents assigned to KUTZ HAROLD (8)· patent assignee history
2011–2015Patents assigned to THIAGARAJAN EASHWAR (6)· patent assignee history
2011–2015Patents assigned to ROHILLA GAJENDER (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CYPRESS SEMICONDUCTOR CORP | 47 | 1998–2021 |
| MAR MONTEself | 12 | 2011–2016 |
| KUTZ HAROLD | 8 | 2011–2016 |
| THIAGARAJAN EASHWAR | 6 | 2011–2015 |
| ROHILLA GAJENDER | 5 | 2011–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Issaquah, Washington, US | 53 | 1998–2021 |
| Beaverton, OR, US | 1 | 1999 |
| Beverton, OR, US | 1 | 1996 |