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Inventor

Shouchang Tsao

Inventor
San Jose, CA, US

Overview

5→
Patents
1997–2008
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores100%
PatentTitleYear
7,394,690'Method for column redundancy using data latches in solid-state memories'20087,339,822'Current-limited latch'20087,319,630'Current-limited latch'20087,224,605'Non-volatile memory with redundancy data buffered in data latches for defective locations'20075,663,907'Switch driver circuit for providing small sector sizes for negative gate erase flash EEPROMS using a standard twin-well CMOS process'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997Patents assigned to BRIGHT MICROELECTRONICS INC (1)· patent assignee history
1997Based in Sunnyvale, CA, US· patent location history
2007–2008Patents assigned to SANDISK CORP (4)· patent assignee history
2007–2008Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SANDISK CORP42007–2008
BRIGHT MICROELECTRONICS INC11997
Locations
LocationPatentsSpan
San Jose, California, US42007–2008
Sunnyvale, California, US11997