Inventor

Rainer Leuschner

Inventor
Regensburg, DE

Overview

73→
Patents
1989–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 73 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
G11CStatic stores10%
H10NElectric solid-state devices not otherwise provided for7%
H10BElectronic memory devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
H01LSemiconductor devices4%
H10DInorganic electric semiconductor devices4%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy4%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution4%
PatentTitleYear
10,859,457Sensor device including sensor unit for a gaseous medium202010,157,765Methods for processing a semiconductor workpiece201810,102,967Method of manufacturing an inductor core for a chip assembly and chip assembly20189,929,438'Method of manufacturing a lithium ion battery'20189,917,333'Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery'20189,884,757'MEMS sensor package systems and methods'20189,614,256'Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery'20179,593,009'Apparatus comprising and a method for manufacturing an embedded MEMS device'20179,196,670'Through substrate features in semiconductor substrates'20159,159,620'Semiconductor structure and method for making same'20158,990,744'Electrical measurement based circuit wiring layout modification method and system'20158,872,288'Apparatus comprising and a method for manufacturing an embedded MEMS device'20148,822,329'Method for making conductive interconnects'20148,741,690'Packaged semiconductor device with encapsulant embedding semiconductor chip that includes contact pads'20148,697,574'Through substrate features in semiconductor substrates'20148,665,629'Condensed memory cell structure using a FinFET'20148,618,620'Pressure sensor package systems and methods'20138,310,866'MRAM device structure employing thermally-assisted write operations and thermally-unassisted self-referencing operations'20128,183,696'Packaged semiconductor device with encapsulant embedding semiconductor chip that includes contact pads'20127,903,454'Integrated circuit, memory cell array, memory module, and method of operating an integrated circuit'20117,855,435'Integrated circuit, method of manufacturing an integrated circuit, and memory module'20107,697,322'Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module'20107,660,151'Method for programming an integrated circuit, method for programming a plurality of cells, integrated circuit, cell arrangement'20107,643,332'MRAM cell using multiple axes magnetization and method of operation'20107,344,896'Ferromagnetic liner for conductive lines of magnetic memory cells and methods of manufacturing thereof'20087,259,024'Method of treating a substrate in manufacturing a magnetoresistive memory cell'20077,259,025'Ferromagnetic liner for conductive lines of magnetic memory cells'20077,250,662'Magnetically lined conductors'20077,170,173'Magnetically lined conductors'20077,122,899'Semiconductor device and production process'20067,092,284'MRAM with magnetic via for storage of information and field sensor'20067,088,612'MRAM with vertical storage element in two layer-arrangement and field sensor'20067,083,990'Method of fabricating MRAM cells'20067,075,807'Magnetic memory with static magnetic offset field'20066,933,538'Plasma encapsulation for electronic and microelectronic components such as organic light emitting diodes'20056,815,248'Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing'20046,734,095'Method for producing cavities with submicrometer patterns in a semiconductor device using a freezing process liquid'20046,704,230'Error detection and correction method and apparatus in a magnetoresistive random access memory'20046,704,220'Layout for thermally selected cross-point MRAM cell'20046,696,315'Semiconductor device configuration with cavities of submicrometer dimensions and method of fabricating structured cavities'20046,645,850'Semiconductor device having cavities with submicrometer dimensions generated by a swelling process'20036,614,048'Memory element with molecular or polymeric layers, memory cell, memory array, and smart card'20036,582,888'Method for producing organic electroluminescent components'20036,576,358'Method of discharging reaction water in PEM fuel cells and fuel cell for carrying out the method'20036,503,655'Gas diffusion electrode and its production'20036,361,666'Gas diffusion electron, process for producing an electrode an carbonizable composite'20026,310,401'Substrate for high-voltage modules'20016,251,558'Chemically amplified resist'20016,171,755'Chemically amplified resist'20016,110,637'Photoresists which are suitable for producing sub-micron size structures'20006,042,993'Photolithographic structure generation process'20005,863,705'Photolithographic pattern generation'19995,851,733'Photolithographic pattern generation'19985,733,706'Dry-developable positive resist'19985,703,186'Mixed polymers'19975,668,625'Apparatus for and method for handling film in a photographic printer'19975,616,667'Copolymers'19975,556,812'Connection and build-up technique for multichip modules'19965,512,334'Method for the production of a bottom resist'19965,384,220'Production of photolithographic structures'19955,368,901'Method for the production of a bottom resist'19945,360,693'Positive o-quinone diazide photoresist containing base copolymer utilizing monomer having anhydride function and further monomer that increases etch resistance'19945,275,920'Method of dry development utilizing quinone diazide and basic polymer resist with latent image intensification through treatment with silicon-organic compound in water'19945,262,283'Method for producing a resist structure'19935,250,375'Photostructuring process'19935,234,794'Photostructuring method'19935,234,793'Method for dimensionally accurate structure transfer in bilayer technique wherein a treating step with a bulging agent is employed after development'19935,229,258'Method for producing a resist structure'19935,194,629'Process for producing N-tertiary butoxycarbonyl-maleinimide'19935,173,393'Etch-resistant deep ultraviolet resist process having an aromatic treating step after development'19925,171,656'Photosensitive composition'19925,037,876'Planarizing dielectric'19914,812,200'Method for generating resist structures'1989

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1989–2003Patents assigned to SIEMENS AG (28)· patent assignee history
1989–2003Based in Grossenseebach, DE· patent location history
1993–2000Based in Erlangen, DE· patent location history
2001–2020Patents assigned to INFINEON TECHNOLOGIES AG (30)· patent assignee history
2003–2007Based in Mohegan Lake, NY, US· patent location history
2006–2014Patents assigned to ALTIS SEMICONDUCTOR SNC (11)· patent assignee history
2006–2017Based in Samoreau, FR· patent location history
2010–2014Patents assigned to QIMONDA AG (6)· patent assignee history
2010–2020Based in Regensburg, DE· patent location history
2012–2014Patents assigned to LEUSCHNER RAINER (8)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INFINEON TECHNOLOGIES AG302001–2020
SIEMENS AG281989–2003
ALTIS SEMICONDUCTOR SNC112006–2014
LEUSCHNER RAINERself82012–2014
QIMONDA AG62010–2014
Locations
LocationPatentsSpan
Regensburg, DE202010–2020
Grossenseebach, DE151989–2003
Erlangen, DE141993–2000
Mohegan Lake, New York, US102003–2007
Samoreau, FR92006–2017