Inventor
Joseph T. Scanlon
Inventor
Sunnyvale, CA, US
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing88%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use13%
PatentTitleYear
10,712,800Aligning active and idle phases in a mixed workload computing platform20205,740,402'Conflict resolution in interleaved memory systems with multiple parallel accesses'19985,632,025'Method for preventing multi-level cache system deadlock in a multi-processor system'19975,572,704'System and method for controlling split-level caches in a multi-processor system including data loss and deadlock prevention schemes'19965,537,538'Debug mode for a superscalar RISC processor'19965,526,504'Variable page size translation lookaside buffer'19965,510,934'Memory system including local and global caches for storing floating point and integer data'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–1998Patents assigned to SILICON GRAPHICS INC (6)· patent assignee history
1996–2020Based in Sunnyvale, CA, US· patent location history
2020Patents assigned to ADVANCED MICRO DEVICES INC (1)· patent assignee history
2020Patents assigned to ATI TECHNOLOGIES ULC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON GRAPHICS INC | 6 | 1996–1998 |
| ADVANCED MICRO DEVICES INC | 1 | 2020 |
| ATI TECHNOLOGIES ULC | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Sunnyvale, California, US | 7 | 1996–2020 |