Inventor

Tsuyoshi Toyama

Inventor
Hyogo, JP

Overview

18→
Patents
1987–2019
Patent span
Physics
Primary field (CPC G)

Patents· 18 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores35%
G06FElectric digital data processing18%
H10DInorganic electric semiconductor devices9%
H03KPulse technique6%
H04LTransmission of digital information, e.g. telegraphic communication6%
H10BElectronic memory devices6%
B60WConjoint control of vehicle sub-units of different type or different function3%
G06KGraphical data reading3%
G06VImage or video recognition or understanding3%
G07CTime or attendance registers3%
PatentTitleYear
10,484,184Vehicle system and authentication method201910,397,244System and method for detecting attack when sensor and traffic information are inconsistent20195,262,342'Method of making a semiconductor memory device having error checking/correcting functions'19935,262,984'Non-volatile memory device capable of storing multi-state data'19935,195,099'Semiconductor memory device having improved error correcting circuit'19935,182,725'Nonvolatile semiconductor memory device with reduced variation in source potential of floating gate type memory transistor and operating method therefor'19935,172,339'Semiconductor memory device having error checking and correcting circuit and operating method therefor'19925,107,313'Floating gate type semiconductor memory device'19925,105,386'Nonvolatile semiconductor memory device with reduced variation in source potential of floating gate type memory transistors and operating method therefor'19925,097,152'Buffer circuit used in a semiconductor device operating by different supply potentials and method of operating the same'19925,058,071'Semiconductor memory device having means for repairing the memory device with respect to possible defective memory portions'19915,021,999'Non-volatile semiconductor memory device with facility of storing tri-level data'19915,003,205'Buffer circuit used in a semiconductor device operating by different supply potentials and method of operating the same'19914,958,352'Semiconductor memory device with error check and correcting function'19904,949,305'Erasable read-only semiconductor memory device'19904,827,452'Semiconductor memory including a selectively disabled redunancy circuit'19894,779,272'Testable variable-threshold non-volatile semiconductor memory'19884,651,186'Field effect transistor with improved withstand voltage characteristic'1987

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1987–1993Patents assigned to MITSUBISHI ELECTRIC CORP (16)· patent assignee history
1987Based in Itami, JP· patent location history
1988–1993Based in Hyogo, JP· patent location history
1989Based in Itama, JP· patent location history
2019Patents assigned to TOYOTA MOTOR CO LTD (2)· patent assignee history
2019Patents assigned to NAT UNIV CORP YOKOHAMA NAT UNIV (1)· patent assignee history
2019Based in Yokohama, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MITSUBISHI ELECTRIC CORP161987–1993
TOYOTA MOTOR CO LTD22019
NAT UNIV CORP YOKOHAMA NAT UNIV12019
Locations
LocationPatentsSpan
Hyogo, JP141988–1993
Yokohama, JP22019
Itama, JP11989
Itami, JP11987