Inventor

Fei Zhou

Inventor
Shanghai, CN

Overview

158→
Patents
2007–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 158 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices23%
H10DInorganic electric semiconductor devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H10BElectronic memory devices7%
G06FElectric digital data processing5%
C07DHeterocyclic compounds2%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations2%
H05KPrinted circuits2%
H04LTransmission of digital information, e.g. telegraphic communication1%
PatentTitleYear
10,876,973System and method for remote detection of SERS spectra202010,868,025Three-dimensional memory device including replacement crystalline channels and methods of making the same202010,832,968Device with improved shallow trench isolation structure202010,833,062Diode design of FinFET device202010,833,177Semiconductor device and fabrication method thereof202010,817,500Reduce log contention by batching log record transfers to the log202010,818,542Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same202010,804,282Three-dimensional memory devices using carbon-doped aluminum oxide backside blocking dielectric layer for etch resistivity enhancement and methods of making the same202010,804,291Three-dimensional memory device using epitaxial semiconductor channels and a buried source line and method of making the same202010,804,260Semiconductor structure with doped layers on fins and fabrication method thereof202010,797,147Semiconductor structure and fabrication method thereof202010,797,060Three-dimensional memory device having stressed vertical semiconductor channels and method of making the same202010,797,044Electrostatic discharge protection device and method202010,797,061Three-dimensional memory device having stressed vertical semiconductor channels and method of making the same202010,790,392Semiconductor structure and fabricating method thereof202010,790,300Three-dimensional memory device having an epitaxial vertical semiconductor channel and method for making the same202010,770,590Semiconductor structures and fabrication methods thereof202010,770,352Semiconductor device and fabrication method thereof202010,770,360Semiconductor structures and fabrication methods thereof202010,763,259Semiconductor device manufacturing method202010,756,110Method of forming seamless drain-select-level electrodes for a three-dimensional memory device and structures formed by the same202010,748,814Fabrication method of semiconductor device by removing sacrificial layer on gate structures202010,748,816Semiconductor device and fabrication method thereof202010,741,670Semiconductor structures and fabrication methods thereof202010,734,381Fin-FET devices202010,727,130Semiconductor device and fabrication method thereof202010,714,585Gate-all-around field-effect-transistor devices and fabrication methods thereof202010,714,613Semiconductor device202010,714,590Semiconductor structure with protection layer and fabrication method thereof202010,714,469Electrostatic discharge protection structure202010,707,233Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same202010,700,086Three-dimensional flat NAND memory device having high mobility channels and methods of making the same202010,692,779Method and structure for CMOS metal gate stack202010,686,078Semiconductor structure and fabrication method thereof202010,685,889Semiconductor structures and fabrication methods thereof202010,680,079Semiconductor structure and fabrication method thereof202010,679,905Semiconductor structures and fabrication methods thereof202010,665,581Three-dimensional semiconductor chip containing memory die bonded to both sides of a support die and methods of making the same202010,665,699Semiconductor structure and fabrication method thereof202010,658,512Fin field effect transistor and fabrication method thereof202010,651,092Semiconductor device and fabrication method thereof202010,651,196Three-dimensional multilevel device containing seamless unidirectional metal layer fill and method of making same202010,644,169Method of manufacturing a FinFET varactor202010,644,135FinFET device with non-recessed STI202010,622,369Three-dimensional memory device including contact via structures that extend through word lines and method of making the same202010,622,358LDMOS FinFET device202010,615,123Three-dimensional memory device containing compositionally graded word line diffusion barrier layer for and methods of forming the same202010,613,788Data migration between cloud storage systems202010,593,595Semiconductor structures202010,586,713Semiconductor device and fabrication method thereof202010,566,431Semiconductor device, manufacture thereof, and a radiation measurement method202010,566,421Method for manufacturing a BJT FINFET device202010,553,592Fabrication method of a semiconductor structure by a gate cutting process with multiple sidewall spacers formation in a dummy gate opening202010,553,722Fin field effect transistor and fabrication method thereof202010,529,620Three-dimensional memory device containing word lines formed by selective tungsten growth on nucleation controlling surfaces and methods of manufacturing the same202010,522,632Semiconductor structure and fabrication method thereof201910,522,613Manufacturing method of a resistance device having a fin201910,483,263Semiconductor device and manufacturing method therefor201910,461,188Semiconductor device and manufacturing method therefor201910,460,996Fin field effect transistor and fabrication method thereof201910,446,538Electrostatic discharge protection structure and fabrication method thereof201910,446,463Semiconductor structures and fabrication methods thereof201910,446,648Semiconductor device and manufacturing method thereof201910,431,498Semiconductor devices and fabrication methods thereof201910,424,662Semiconductor structure and fabrication method thereof201910,418,362Self-heating test structure201910,418,283Method and device to improve shallow trench isolation201910,418,286Semiconductor structure and fabrication method thereof201910,403,741Channel stop imp for FinFET device201910,403,549Semiconductor devices and fabrication methods thereof201910,396,174STI-diode structure201910,388,575Semiconductor devices and fabrication methods thereof201910,381,409Three-dimensional phase change memory array including discrete middle electrodes and methods of making the same201910,381,559Three-dimensional phase change memory array including discrete middle electrodes and methods of making the same201910,381,364Three-dimensional memory device including vertically offset drain select level layers and method of making thereof201910,367,058Channel stop imp for the FinFET device201910,361,305Semiconductor structure and fabrication method thereof201910,361,213Three dimensional memory device containing multilayer wordline barrier films and method of making thereof201910,361,288Method for manufacturing FinFETs by implanting counter-doped regions in lightly-doped S/D extensions away from the channel201910,354,993Electrostatic discharge protection structure and fabricating method thereof201910,355,139Three-dimensional memory device with amorphous barrier layer and method of making thereof201910,340,274LDMOS FinFET device201910,304,745Structure for CMOS metal gate stack201910,297,595Fin-FET devices and fabrication methods thereof201910,290,652Three-dimensional memory device with graded word lines and methods of making the same201910,290,648Three-dimensional memory device containing air gap rails and method of making thereof201910,283,513Three-dimensional memory device with annular blocking dielectrics and method of making thereof201910,276,583Three-dimensional memory device containing composite word lines including a metal silicide and an elemental metal and method of making thereof201910,269,927Semiconductor structures and fabrication methods thereof201910,269,972Fin-FET devices and fabrication methods thereof201910,224,248Semiconductor structure and fabricating method thereof201910,213,073Window-cleaning robot provided with closed wiper201910,211,309Method and device for metal gate stacks201910,199,494Laterally diffused metal-oxide-semiconductor devices and fabrication methods thereof201910,177,145Semiconductor structures and fabrication methods thereof201910,157,771Semiconductor device and fabrication method thereof201810,121,860BJT structure design for 14nm FinFET device201810,114,848Ensuring the same completion status for transactions after recovery in a synchronous replication environment201810,115,717Electrostatic discharge protection structure and fabrication method thereof201810,103,169Method of making a three-dimensional memory device using a multi-step hot phosphoric acid wet etch process201810,096,518Semiconductor structures and fabrication methods thereof201810,056,301Transistor and fabrication method thereof201810,043,804LDMOS design for a FinFET device201810,026,841Semiconductor device and manufacturing method therefor201810,016,103Air-releasing valve for use in suction apparatus and suction robot having the air-releasing valve201810,002,869Semiconductor structure and fabrication method thereof20189,985,144FinFET varactor20189,985,037Method and structure for finFET SRAM20189,984,939Well implantation process for FinFET device20189,960,180Three-dimensional memory device with partially discrete charge storage regions and method of making thereof20189,941,658Stackable electrically-isolated diode-laser bar assembly20189,911,833'Semiconductor structures and fabrication methods thereof'20189,882,030'Method to enhance FinFET device performance with channel stop layer depth control'20189,875,929Three-dimensional memory device with annular blocking dielectrics and discrete charge storage elements and method of making thereof20189,847,419Semiconductor device and fabrication method for forming the same20179,848,343Method and system architecture for a self organizing network20179,839,641'Compounds and methods for treating bacterial infections'20179,812,463'Three-dimensional memory device containing vertically isolated charge storage regions and method of making thereof'20179,773,778'Semiconductor device, related manufacturing method, and related electronic device'20179,572,173'Method and system architecture for a self organizing network'20179,540,394'Compounds and methods for treating bacterial infections'20179,521,746'Conductive film and preparation method thereof'20169,424,145'Ensuring the same completion status for transactions after recovery in a synchronous replication environment'20169,414,329'Autonomous power adaptation in a heterogeneous cellular environment'20169,362,769'Method and apparatus for power supply control and electronic device'20169,313,896'Double-layered transparent conductive film and manufacturing method thereof'20169,287,644'Bridge structure in conductive mesh and method for manufacturing the same'20169,258,877'Patterned transparent conductive film based on random grid'20169,217,678'Touch sensor panel with conductive wires and color traces'20159,198,285'Touch screen and conductive layer thereof'20159,187,495'Compounds and methods for treating bacterial infections'20159,152,666'Distributed database system providing data and space management methodology'20159,137,684'Method and system architecture for a self organizing network'20159,063,604'Touch screen and manufacturing method thereof'20159,066,426'Transparent conductive film'20159,066,427'Conductive layer of touch screen'20159,040,528'Chemical compounds 542'20159,024,197'Patterned transparent conductive film'20158,993,896'Lead electrode and preparation method thereof'20158,889,671'Compounds and methods for treating bacterial infections'20148,862,134'Autonomous power adaptation in a heterogeneous cellular environment'20148,658,641'Fused, spirocyclic heteroaromatic compounds for the treatment of bacterial infections'20148,504,735'Output system and method for restoring location arrangement of output devices'20138,412,208'Autonomous fractional time reuse'20138,399,489'Antibacterial piperdine derivatives'20138,275,179'Apparatus for capturing a high quality image of a moist finger'20128,266,111'Distributed database system providing data and space management methodology'20128,249,192'Techniques to transmit data rate control signals for multi-carrier wireless systems'20128,071,605'Piperidine compounds for use in the treatment of bacterial infections'20117,899,794'Optimizing lock acquisition on transaction logs'20117,899,935'Method and system for data synchronization'20117,835,315'Method and apparatus for providing addressing in a multi-carrier communication system'20107,783,610'Distributed database system providing data and space management methodology'20107,498,350'Oxazolidinones as antibacterial agents'20097,473,699'3-cyclyl-5-(nitrogen-containing 5-membered ring)methyl-oxazolidinone derivatives and their use as antibacterial agents'20097,447,710'Database system providing self-tuned parallel database recovery'20087,403,945'Distributed database system providing data and space management methodology'20087,199,143'Chemical compounds'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2015Based in Waltham, MA, US· patent location history
2011–2020Patents assigned to ZHOU FEI (10)· patent assignee history
2013–2020Based in Milpitas, CA, US· patent location history
2015–2016Patents assigned to NANCHANG O FILM TECH CO LTD (11)· patent assignee history
2015–2016Based in Jiangxi, CN· patent location history
2017–2020Patents assigned to SEMICONDUCTOR MFG INT SHANGHAI CORP (76)· patent assignee history
2017–2020Patents assigned to SANDISK TECHNOLOGIES LLC (28)· patent assignee history
2017–2020Based in Shanghai, CN· patent location history
2018–2020Patents assigned to SEMICONDUCTOR MFG INT BEIJING CORP (68)· patent assignee history
2018–2020Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SEMICONDUCTOR MFG INT SHANGHAI CORP762017–2020
SEMICONDUCTOR MFG INT BEIJING CORP682018–2020
SANDISK TECHNOLOGIES LLC282017–2020
NANCHANG O FILM TECH CO LTD112015–2016
ZHOU FEIself102011–2020
Locations
LocationPatentsSpan
Shanghai, CN812017–2020
San Jose, California, US182018–2020
Milpitas, California, US162013–2020
Waltham, Massachusetts, US82007–2015
Jiangxi, CN72015–2016