Inventor
MICHAEL RIZZOLO
Inventor
US
Overview
Patents· 43 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices17%
H10NElectric solid-state devices not otherwise provided for17%
H10BElectronic memory devices16%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
G11CStatic stores6%
G06FElectric digital data processing4%
H01FMagnets3%
G06NComputing arrangements based on specific computational models2%
G08GTraffic control systems2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
PatentTitleYear
12,588,421Memory element with a hardmask stack having different stress levels202612,588,216Pillar based memory (MRAM) embedded within the buried power rail within a backside power distribution network202612,557,297Leveling dielectric surfaces for contact formation with embedded memory arrays202612,550,709Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device202612,469,777BEOL interconnect subtractive etch super via202512,464,731Layered bottom electrode dielectric for embedded MRAM202512,464,960Metal hard mask integration for active device structures202512,457,905Patterning magnetic tunnel junctions and the like while reducing detrimental resputtering of underlying features202512,439,608MRAM integration with self-aligned direct back side contact202512,218,003Selective ILD deposition for fully aligned via with airgap202511,955,424Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device202411,942,126Selectively biasing magnetoresistive random-access memory cells202411,869,783Optimizating semiconductor binning by feed-forward process adjustment202411,869,561Spin orbit-torque magnetic random-access memory (SOT-MRAM) with cross-point spin hall effect (SHE) write lines and remote sensing read magnetic tunnel-junction (MTJ)202411,812,668Pillar-based memory hardmask smoothing and stress reduction202311,790,072Paint on micro chip touch screens202311,735,524Electrical device having conductive lines with air gaps therebetween and interconnects without exclusion zones202311,711,982Laser anneal for MRAM encapsulation enhancement202311,676,854Selective ILD deposition for fully aligned via with airgap202311,665,974MRAM containing magnetic top contact202311,636,353Cognitive system for localized LIDAR pollution detection using autonomous vehicles202311,610,941Integrated non volatile memory electrode thin film resistor cap and etch stop202311,574,864Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device202311,569,442Dielectric retention and method of forming memory pillar202311,552,243MRAM structure with ternary weight storage202311,502,242Embedded memory devices202211,488,863Self-aligned contact scheme for pillar-based memory elements202211,476,415Patterning magnetic tunnel junctions and the like while reducing detrimental resputtering of underlying features202211,444,029Back-end-of-line interconnect structures with varying aspect ratios202211,424,403Magnetoresistive random-access memory cell having a metal line connection202211,351,811Optically-passive magnetic signature and identification feature with electromagnetic tamper detection202211,348,060Increasing cost benefit and energy efficiency with modular delivery drones in inclement weather202211,348,872Hybrid dielectric scheme for varying liner thickness and manganese concentration202211,276,636Adjustable via dimension and chamfer angle202211,263,068Proximity correction in three-dimensional manufacturing202211,223,008Pillar-based memory hardmask smoothing and stress reduction202211,223,655Semiconductor tool matching and manufacturing management in a blockchain202211,195,993Encapsulation topography-assisted self-aligned MRAM top contact202111,177,437Alignment through topography on intermediate component for memory device patterning202111,164,377Motion-controlled portals in virtual reality202111,164,779Bamboo tall via interconnect structures202111,158,584Selective CVD alignment-mark topography assist for non-volatile memory202111,138,890Secure access for drone package delivery2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to IBM (38)· patent assignee history
2021–2026Based in US· patent location history
2023Patents assigned to TESSERA LLC (2)· patent assignee history
2024–2026Patents assigned to ADEIA SEMICONDUCTOR SOLUTIONS LLC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 38 | 2021–2026 |
| ADEIA SEMICONDUCTOR SOLUTIONS LLC | 3 | 2024–2026 |
| TESSERA LLC | 2 | 2023 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 43 | 2021–2026 |