Inventor
Albert X. Widmer
Inventor
Katonah, NY, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Mprimary
H03MCoding45%
H04LTransmission of digital information, e.g. telegraphic communication33%
G06FElectric digital data processing6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
H03FAmplifiers3%
H04BTransmission3%
H04JMultiplex communication3%
PatentTitleYear
7,592,933'Techniques for 9B10B and 7B8B coding and decoding'20097,405,679'Techniques for 9B10B and 7B8B coding and decoding'20087,292,161'NB/MB coding apparatus and method using both disparity independent and disparity dependent encoded vectors'20076,978,416'Error correction with low latency for bus structures'20056,977,599'8B/10B encoding and decoding for high speed applications'20056,911,921'5B/6B-T, 3B/4B-T and partitioned 8B/10B-T and 10B/12B transmission codes, and their implementation for high operating rates'20056,876,315'DC-balanced 6B/8B transmission code with local parity'20056,614,369'DC balanced 7B/8B, 9B/10B, and partitioned DC balanced 12B/14B, 17B/20B, and 16B/18B transmission codes'20036,549,310'Fiber optic data link module with built-in link diagnostics'20036,496,540'Transformation of parallel interface into coded format with preservation of baud-rate'20026,452,900'Flow control process for a switching architecture using an out-of-band flow control channel and apparatus for performing the same'20026,429,794'Format converter'20026,198,413'Partitioned DC balanced (0,6) 16B/18B transmission code with error correction'20015,784,387'Method for detecting start-of-frame, end of frame and idle words in a data stream'19985,740,186'Apparatus and method for error correction based on transmission code violations and parity'19985,699,062'Transmission code having local parity'19975,648,776'Serial-to-parallel converter using alternating latches and interleaving techniques'19975,457,718'Compact phase recovery scheme using digital circuits'19955,301,196'Half-speed clock recovery and demultiplexer circuit'19944,665,517'Method of coding to minimize delay at a communication node'19874,486,739'Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code'19844,408,167'Current amplifier stage with diode interstage connection'19833,980,826'Means of predistorting digital signals'1976Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1976–2009Patents assigned to IBM (23)· patent assignee history
1976–2009Based in Katonah, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 23 | 1976–2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Katonah, New York, US | 23 | 1976–2009 |