Inventor
Georgios Palaskas
Inventor
Portland, OR, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Fprimary
H03FAmplifiers19%
H04BTransmission17%
H04LTransmission of digital information, e.g. telegraphic communication12%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses7%
H03MCoding7%
G04FTime-interval measuring5%
H03CModulation5%
H03KPulse technique5%
G01RMeasuring electric variables2%
G06FElectric digital data processing2%
PatentTitleYear
10,886,878Modulation circuitry with N.5 division202110,707,848Apparatus and method for interpolating between a first and a second signal20209,800,439'Apparatus and method for digital-to-time converter spur dithering'20179,515,062'Electronic devices and methods having a compact multi-way transformer combiner'20169,306,503'Systems and methods for combining power through a transformer'20169,209,958'Segmented digital-to-time converter calibration'20159,194,911'Hardware-efficient on-chip calibration of analog/RF through sub-sampling'20159,172,338'Transformer-based RF power amplifier'20158,502,598'Digitally-scalable transformer combining power amplifier'20138,472,896'Method and apparatus for transformer power combiner and dynamic power control for outphasing power amplifiers'20138,222,966'System, method and apparatus for an open loop calibrated phase wrapping phase modulator for wideband RF outphasing/polar transmitters'20128,207,770'Digital phase lock loop'20127,856,212'Millimeter-wave phase-locked loop with injection-locked frequency divider using quarter-wavelength transmission line and method of calibration'20107,657,232'Offset-frequency loop-back calibration'20107,653,147'Transmitter control'20107,609,792'Multiple-input multiple-output multichip transceiver with correlated clock signals'20097,605,625'Device, system and method of delay calibration'20097,362,246'High speed comparator offset correction'20087,333,423'Transceiver with calibrated I and Q paths and methods for deconvolved calibration'20087,250,815'Amplifier distortion management apparatus, systems, and methods'20077,212,141'Filter with gain'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2017Patents assigned to INTEL CORP (19)· patent assignee history
2007–2021Based in Portland, OR, US· patent location history
2012–2015Patents assigned to PALASKAS GEORGIOS (6)· patent assignee history
2012–2013Patents assigned to RAVI ASHOKE (3)· patent assignee history
2013–2015Patents assigned to XU HONGTAO (3)· patent assignee history
2020–2021Patents assigned to INTEL IP CORP (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 19 | 2007–2017 |
| PALASKAS GEORGIOSself | 6 | 2012–2015 |
| RAVI ASHOKE | 3 | 2012–2013 |
| XU HONGTAO | 3 | 2013–2015 |
| INTEL IP CORP | 2 | 2020–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Portland, OR, US | 21 | 2007–2021 |