Inventor
James F. Burgess
Inventor
Schenectady, NY, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1028%
Y10TTechnical subjects covered by former us classification15%
H05KPrinted circuits10%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
B05BSpraying apparatus5%
C04BLime, magnesia5%
B23KSoldering or unsoldering3%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form3%
B60SServicing, cleaning, repairing, supporting, lifting, or manoeuvring of vehicles, not otherwise provided for3%
B61KAuxiliary equipment specially adapted for railways, not otherwise provided for3%
PatentTitleYear
10,926,789Steering assembly20216,622,739'Method and apparatus for removal of coatings and oxidation from transit vehicles'20036,136,379'Method for applying metal-filled solventless resin coating'20005,964,418'Spray nozzle for applying metal-filled solventless resin coating and method'19995,637,922'Wireless radio frequency power semiconductor devices using high density interconnect'19975,532,512'Direct stacked and flip chip power semiconductor device structures'19965,324,987'Electronic apparatus with improved thermal expansion match'19945,293,070'Integrated heat sink having a sinuous fluid channel for the thermal dissipation of semiconductor modules'19945,209,390'Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid'19935,166,773'Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid'19925,135,890'Method of forming a hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip'19925,105,536'Method of packaging a semiconductor chip in a low inductance package'19925,103,290'Hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip'19925,100,740'Direct bonded symmetric-metallic-laminate/substrate structures'19925,028,987'High current hermetic package having a lead extending through the package lid and a packaged semiconductor chip'19914,996,116'Enhanced direct bond structure'19914,803,450'Multilayer circuit board fabricated from silicon'19894,711,804'Circuit board construction'19874,103,274'Reconstituted metal oxide varistor'19783,993,411'Bonds between metal and a non-metallic substrate'1976Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1976–1997Patents assigned to GEN ELECTRIC (16)· patent assignee history
1976–1997Based in Schenectady, NY, US· patent location history
1999–2000Patents assigned to USBI CO (2)· patent assignee history
1999–2003Based in Huntsville, AL, US· patent location history
2003Patents assigned to ADVANCED SYSTEMS TECHNOLOGIES (1)· patent assignee history
2021Patents assigned to SAINT GOBAIN PERFORMANCE PLASTICS RENCOL LTD (1)· patent assignee history
2021Based in Gloucester, GB· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GEN ELECTRIC | 16 | 1976–1997 |
| USBI CO | 2 | 1999–2000 |
| ADVANCED SYSTEMS TECHNOLOGIES | 1 | 2003 |
| SAINT GOBAIN PERFORMANCE PLASTICS RENCOL LTD | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Schenectady, New York, US | 16 | 1976–1997 |
| Huntsville, AL, US | 3 | 1999–2003 |
| Gloucester, GB | 1 | 2021 |