Inventor

Sujit Sharan

Inventor

Boise, ID, US

Overview

1996–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 164 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%

H10DInorganic electric semiconductor devices17%

C23CCoating metallic material12%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests7%

H01LSemiconductor devices4%

H01JElectric discharge tubes or discharge lamps4%

C30BSingle-crystal growth3%

H10BElectronic memory devices2%

B24BMachines, devices, or processes for grinding or polishing1%

PatentTitleYear

11,114,394Signal routing carrier2021 11,031,288Passive components in vias in a stacked integrated circuit package2021 10,978,423Projecting contacts and method for making the same2021 10,923,429Multi-chip package and method of providing die-to-die interconnects in same2021 10,916,514Metal-free frame design for silicon bridges for semiconductor packages2021 10,797,014Rounded metal trace corner for stress reduction2020 10,763,216Multi-chip package and method of providing die-to-die interconnects in same2020 10,651,117Low-inductance current paths for on-package power distributions and methods of assembling same2020 10,510,669Multi-chip package and method of providing die-to-die interconnects in same2019 10,475,736Via architecture for increased density interface2019 10,461,047Metal-free frame design for silicon bridges for semiconductor packages2019 10,418,312Guard ring design enabling in-line testing of silicon bridges for semiconductor packages2019 10,236,209Passive components in vias in a stacked integrated circuit package2019 10,177,083Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages2019 10,002,824Magnetic alignment for flip chip microelectronic devices2018 9,875,969Multi-chip package and method of providing die-to-die interconnects in same2018 9,711,443'Magnetic alignment for flip chip microelectronic devices'2017 9,258,880'Package substrate and die spacer layers having a ceramic backbone'2016 8,604,353'Package substrate and die spacer layers having a ceramic backbone'2013 8,227,904'Multi-chip package and method of providing die-to-die interconnects in same'2012 8,186,051'Method for fabricating package substrate and die spacer layers having a ceramic backbone'2012 7,656,035'C4 joint reliability'2010 7,625,641'Method of forming a crystalline phase material'2009 7,527,722'Electrochemical mechanical planarization'2009 7,517,787'C4 joint reliability'2009 7,468,104'Chemical vapor deposition apparatus and deposition method'2008 7,402,512'High aspect ratio contact structure with reduced silicon consumption'2008 7,341,931'Methods of forming low resistivity contact for an integrated circuit device'2008 7,268,078'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'2007 7,265,032'Protective layer during scribing'2007 7,255,128'System and method for detecting flow in a mass flow controller'2007 7,229,666'Chemical vapor deposition method'2007 7,211,499'Methods of forming silicon dioxide layers, and methods of forming trench isolation regions'2007 7,196,020'Method for PECVD deposition of selected material films'2007 7,185,384'Wafer cleaning brush'2007 7,151,054'Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks'2006 7,114,404'System and method for detecting flow in a mass flow controller'2006 7,093,559'Method for PECVD deposition of selected material films'2006 7,087,111'Method of forming a refractory metal silicide'2006 7,033,939'Chemistry for chemical vapor deposition of titanium containing films'2006 7,022,618'Method of forming a conductive contact'2006 7,018,908'Methods of forming silicon dioxide layers, and methods of forming trench isolation regions'2006 6,977,225'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'2005 6,977,221'Methods of forming an electrically conductive line'2005 6,974,726'Silicon wafer with soluble protective coating'2005 6,949,273'Methods of forming coatings on gas-dispersion fixtures in chemical-vapor-deposition systems'2005 6,943,107'Methods of forming a refractory metal silicide'2005 6,921,708'Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean'2005 6,908,849'High aspect ratio contact structure with reduced silicon consumption'2005 6,905,397'Apparatus for enhanced rate chemical mechanical polishing with adjustable selectivity'2005 6,884,716'Method of forming a crystalline phase material'2005 6,858,904'High aspect ratio contact structure with reduced silicon consumption'2005 6,841,474'Method of forming a refractory metal silicide'2005 6,835,654'Methods of forming an electrically conductive line'2004 6,822,299'Boron-doped titanium nitride layer for high aspect ratio semiconductor devices'2004 6,815,344'Methods of forming an electrically conductive line'2004 6,812,512'Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture'2004 6,800,517'Methods of forming conductive interconnects'2004 6,791,149'Diffusion barrier layer for semiconductor wafer fabrication'2004 6,777,330'Chemistry for chemical vapor deposition of titanium containing films'2004 6,773,502'Method of forming a crystalline phase material'2004 6,759,306'Methods of forming silicon dioxide layers and methods of forming trench isolation regions'2004 6,756,088'Methods of forming coatings on gas-dispersion fixtures in chemical-vapor-deposition systems'2004 6,756,293'Combined gate cap or digit line and spacer deposition using HDP'2004 6,749,717'Device for in-situ cleaning of an inductively-coupled plasma chambers'2004 6,750,089'Methods of forming conductive interconnects'2004 6,746,952'Diffusion barrier layer for semiconductor wafer fabrication'2004 6,737,328'Methods of forming silicon dioxide layers, and methods of forming trench isolation regions'2004 6,727,173'Semiconductor processing methods of forming an utilizing antireflective material layers, and methods of forming transistor gate stacks'2004 6,706,158'Electrochemical mechanical planarization'2004 6,705,246'RF powered plasma enhanced chemical vapor deposition reactor and methods of effecting plasma enhanced chemical vapor deposition'2004 6,706,116'Method of forming a crystalline phase material'2004 6,696,368'Titanium boronitride layer for high aspect ratio semiconductor devices'2004 6,686,288'Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture'2004 6,653,234'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'2003 6,642,620'Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean'2003 6,627,465'System and method for detecting flow in a mass flow controller'2003 6,602,785'Method of forming a conductive contact on a substrate and method of processing a semiconductor substrate using an ozone treatment'2003 6,597,042'Contact with germanium layer'2003 6,554,910'Method for treating residues in semiconductor processing chambers'2003 6,533,894'RF powered plasma enhanced chemical vapor deposition reactor and methods of effecting plasma enhanced chemical vapor deposition'2003 6,531,352'Methods of forming conductive interconnects'2003 6,524,975'Combined gate cap or digit line and spacer deposition using HDP'2003 6,499,425'Quasi-remote plasma processing method and apparatus'2002 6,488,571'Apparatus for enhanced rate chemical mechanical polishing with adjustable selectivity'2002 6,472,756'Method of forming titanium silicide and titanium by chemical vapor deposition and resulting apparatus'2002 6,468,925'Plasma enhanced chemical vapor deposition process'2002 6,444,556'Chemistry for chemical vapor deposition of titanium containing films'2002 6,433,430'Contact structure having a diffusion barrier'2002 6,429,071'Method of increasing capacitance of memory cells incorporating hemispherical grained silicon'2002 6,423,626'Removal of metal cusp for improved contact fill'2002 6,412,437'Plasma enhanced chemical vapor deposition reactor and plasma enhanced chemical vapor deposition process'2002 6,398,923'Multiple species sputtering method'2002 6,395,128'RF powered plasma enhanced chemical vapor deposition reactor and methods of effecting plasma enhanced chemical vapor deposition'2002 6,388,284'Capacitor structures'2002 6,368,988'Combined gate cap or digit line and spacer deposition using HDP'2002 6,362,088'Method of forming ohmic conductive components in a single chamber process'2002 6,340,499'Method to increase gas residence time in a reactor'2002 6,340,637'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'2002 6,335,282'Method of forming a titanium comprising layer and method of forming a conductive silicide contact'2002 6,331,482'Method of VLSI contact, trench, and via filling using a germanium underlayer with metallization'2001 6,331,493'Process for making low dielectric constant dielectric films'2001 6,309,967'Method of forming a contact'2001 6,306,766'Method of forming a crystalline phase material, electrically conductive line and refractory metal silicide'2001 6,291,289'Method of forming DRAM trench capacitor with metal layer over hemispherical grain polysilicon'2001 6,291,358'Plasma deposition tool operating method'2001 6,291,341'Method for PECVD deposition of selected material films'2001 6,284,651'Method for forming a contact having a diffusion barrier'2001 6,268,282'Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks'2001 6,258,724'Low dielectric constant dielectric films and process for making the same'2001 6,255,216'Methods of forming a contact having titanium silicide and titanium formed by chemical vapor deposition'2001 6,255,209'Methods of forming a contact having titanium formed by chemical vapor deposition'2001 6,239,029'Sacrificial germanium layer for formation of a contact'2001 6,235,646'RF powered plasma enhanced chemical vapor deposition reactor and methods of effecting plasma enhanced chemical vapor deposition'2001 6,229,213'Germanium alloy electrical interconnect structure'2001 6,227,141'RF powered plasma enhanced chemical vapor deposition reactor and methods'2001 6,208,033'Apparatus having titanium silicide and titanium formed by chemical vapor deposition'2001 6,184,136'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'2001 6,171,943'Methods of forming a contact having titanium silicide formed by chemical vapor deposition'2001 6,159,867'RF powered plasma enhanced chemical vapor deposition reactor and methods of effecting plasma enhanced chemical vapor deposition'2000 6,143,620'Semiconductor processing method of providing a roughened polysilicon film and a capacitor construction'2000 6,140,249'Low dielectric constant dielectric films and process for making the same'2000 6,137,180'Low cost DRAM metallization'2000 6,112,697'RF powered plasma enhanced chemical vapor deposition reactor and methods'2000 6,110,820'Low scratch density chemical mechanical planarization process'2000 6,093,968'Germanium alloy contact to a silicon substrate'2000 6,090,707'Method of forming a conductive silicide layer on a silicon comprising substrate and method of forming a conductive silicide contact'2000 6,090,708'Method of forming a crystalline phase material, electrically conductive line and refractory metal silicide'2000 6,086,442'Method of forming field emission devices'2000 6,085,689'Apparatus to increase gas residence time in a reactor'2000 6,083,358'Multiple species sputtering for improved bottom coverage and improved sputter rate'2000 6,077,754'Methods of forming a silicon nitride film, a capacitor dielectric layer and a capacitor'2000 6,067,680'Semiconductor processing method of forming a conductively doped semiconductive material plug within a contact opening'2000 6,063,700'Method of forming ohmic conductive components in a single chamber process'2000 6,057,200'Method of making a field effect transistor having an elevated source and an elevated drain'2000 6,054,191'Method of forming an electrical contact to a silicon substrate'2000 6,027,970'Method of increasing capacitance of memory cells incorporating hemispherical grained silicon'2000 5,997,634'Method of forming a crystalline phase material'1999 5,998,844'Semiconductor constructions comprising electrically conductive plugs having monocrystalline and polycrystalline silicon'1999 5,990,021'Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture'1999 5,985,767'Facet etch for improved step coverage of integrated circuit contacts'1999 5,977,636'Method of forming an electrically conductive contact plug, method of forming a reactive or diffusion barrier layer over a substrate, integrated circuitry, and method of forming a layer of titanium boride'1999 5,976,976'Method of forming titanium silicide and titanium by chemical vapor deposition'1999 5,963,832'Removal of metal cusp for improved contact fill'1999 5,946,594'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'1999 5,935,336'Apparatus to increase gas residence time in a reactor'1999 5,929,526'Removal of metal cusp for improved contact fill'1999 5,882,978'Methods of forming a silicon nitride film, a capacitor dielectric layer and a capacitor'1999 5,861,344'Facet etch for improved step coverage of integrated circuit contacts'1999 5,856,007'Method and apparatus for forming features in holes, trenches and other voids in the manufacturing of microelectronic devices'1999 5,846,881'Low cost DRAM metallization'1998 5,831,334'Field effect transistors comprising electrically conductive plugs having monocrystalline and polycrystalline silicon'1998 5,759,905'Semiconductor processing method of forming a conductively doped semiconductive material plug within a contact opening'1998 5,750,012'Multiple species sputtering for improved bottom coverage and improved sputter rate'1998 5,747,116'Method of forming an electrical contact to a silicon substrate'1998 5,735,960'Apparatus and method to increase gas residence time in a reactor'1998 5,731,235'Methods of forming a silicon nitrite film, a capacitor dielectric layer and a capacitor'1998 5,730,835'Facet etch for improved step coverage of integrated circuit contacts'1998 5,700,716'Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers'1997 5,677,573'Field effect transistor'1997 5,664,988'Process of polishing a semiconductor wafer having an orientation edge discontinuity shape'1997 5,644,166'Sacrificial CVD germanium layer for formation of high aspect ratio submicron VLSI contacts'1997 5,637,518'Method of making a field effect transistor having an elevated source and an elevated drain'1997 5,533,924'Polishing apparatus, a polishing wafer carrier apparatus, a replacable component for a particular polishing apparatus and a process of polishing wafers'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2009Patents assigned to MICRON TECHNOLOGY INC (132)· patent assignee history

1996–2009Based in Boise, ID, US· patent location history

2000–2004Patents assigned to APPLIED MATERIALS INC (7)· patent assignee history

2002–2021Patents assigned to INTEL CORP (30)· patent assignee history

2002–2021Based in Chandler, AZ, US· patent location history

2009–2010Based in Gilbert, AZ, US· patent location history

2012–2018Patents assigned to ALEKSOV ALEKSANDAR (4)· patent assignee history

2012–2018Patents assigned to SHARAN SUJIT (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MICRON TECHNOLOGY INC	132	1996–2009
INTEL CORP	30	2002–2021
APPLIED MATERIALS INC	7	2000–2004
ALEKSOV ALEKSANDAR	4	2012–2018
SHARAN SUJITself	4	2012–2018

Locations

Location	Patents	Span
Boise, ID, US	121	1996–2009
Chandler, AZ, US	41	2002–2021
Gilbert, AZ, US	2	2009–2010