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Inventor

Kazuyuki Miyazawa

Inventor
Iruma, JP

Overview

66→
Patents
1985–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 66 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores32%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10BElectronic memory devices16%
H10DInorganic electric semiconductor devices13%
G01RMeasuring electric variables4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
G06FElectric digital data processing2%
G06VImage or video recognition or understanding2%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein1%
G06KGraphical data reading1%
PatentTitleYear
10,943,141Object detection device and object detection method202110,643,338Object detection device and object detection method202010,075,725Device and method for image encoding and decoding201810,034,019Image encoding device, image encoding method, image decoding device, and image decoding method20188,155,395'Iris authentication apparatus'20127,821,285'Liquid crystal display apparatus and testing method for liquid crystal display apparatus'20107,525,334'Liquid-crystal display device, defective pixel examination method, defective pixel examination program, and storage medium'20097,499,340'Semiconductor memory device and defect remedying method thereof'20097,345,929'Semiconductor memory device and defect remedying method thereof'20087,257,026'Non-volatile multi-level semiconductor flash memory device and method of driving same'20077,203,101'Semiconductor memory device and defect remedying method thereof'20077,079,416'Non-volatile multi-level, semiconductor flash memory device and method of driving same'20067,016,236'Semiconductor memory device and defect remedying method thereof'20066,992,343'Semiconductor memory device'20066,906,971'Semiconductor integrated circuit device'20056,898,130'Semiconductor memory device and defect remedying method thereof'20056,828,612'Semiconductor memory device'20046,788,572'Non-volatile multi-level semiconductor flash memory device and method of driving same'20046,657,901'Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit'20036,590,808'Non-volatile multi-level semiconductor flash memory device and method of driving same'20036,515,913'Semiconductor memory device and defect remedying method thereof'20036,496,411'Non-volatile multi-level semiconductor flash memory device and method of driving same'20026,335,884'Semiconductor memory device and defect remedying method thereof'20026,335,878'Non-volatile multi-level semiconductor flash memory device and method of driving same'20026,212,089'Semiconductor memory device and defect remedying method thereof'20016,166,950'Nonvolatile semiconductor storage device'20006,160,744'Semiconductor memory device and defect remedying method thereof'20006,121,681'Semiconductor device'20006,078,084'Semiconductor integrated circuit device'20006,049,500'Semiconductor memory device and defect remedying method thereof'20005,872,734'Semiconductor nonvolatile memory device and computer system using the same'19995,854,508'Semiconductor memory device having zigzag bonding pad arrangement'19985,808,944'Semiconductor memory device having a defect relief arrangement'19985,805,513'Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor'19985,748,532'Semiconductor nonvolatile memory device and computer system using the same'19985,742,101'Semiconductor device'19985,670,409'Method of fabricating a semiconductor IC DRAM device enjoying enhanced focus margin'19975,654,577'Semiconductor integrated circuit device'19975,610,089'Method of fabrication of semiconductor integrated circuit device'19975,602,771'Semiconductor memory device and defect remedying method thereof'19975,579,256'Semiconductor memory device and defect remedying method thereof'19965,534,723'Semiconductor integrated circuit device having output and internal circuit MISFETS'19965,514,905'Semiconductor device'19965,467,314'Method of testing an address multiplexed dynamic RAM'19955,436,484'Semiconductor integrated circuit device having input protective elements and internal circuits'19955,436,483'Semiconductor integrated circuit device having a first MISFET of an output buffer circuit and a second MISFET of an internal circuit'19955,426,613'Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor'19955,365,113'Semiconductor device'19945,331,596'Address multiplexed dynamic RAM having a test mode capability'19945,304,868'Non-inverting buffer circuit device and semiconductor memory circuit device'19945,287,000'Resin-encapsulated semiconductor memory device useful for single in-line packages'19945,276,346'Semiconductor integrated circuit device having protective/output elements and internal circuits'19945,217,917'Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor'19935,208,782'Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement'19935,184,208'Semiconductor device'19935,151,772'Semiconductor integrated circuit device'19925,117,393'Method of testing memory cells in an address multiplexed dynamic RAM including test mode selection'19925,047,983'Semiconductor storage device with redundancy arrangement'19914,992,985'Method for selectively initiating/terminating a test mode in an address multiplexed DRAM and address multiplexed DRAM having such a capability'19914,943,949'Semiconductor memory including means for noise suppression'19904,934,820'Semiconductor device'19904,916,700'Semiconductor storage device'19904,893,157'Semiconductor device'19904,873,672'Dynamic random access memory capable of fast erasing of storage data'19894,811,299'Dynamic RAM device having a separate test mode capability'19894,562,555'Semiconductor memory device'1985

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1985–2009Patents assigned to HITACHI LTD (54)· patent assignee history
1985–1991Based in Kodaira, JP· patent location history
1989–2009Based in Iruma, JP· patent location history
1990–2009Patents assigned to HITACHI VLSI ENG (13)· patent assignee history
1997–2007Based in Hidaka, JP· patent location history
1998–2021Patents assigned to MITSUBISHI ELECTRIC CORP (5)· patent assignee history
2004–2008Patents assigned to HITACHI ULSI SYS CO LTD (4)· patent assignee history
2004–2007Patents assigned to ELPIDA MEMORY INC (3)· patent assignee history
2009–2010Based in Nagasaki, JP· patent location history
2018–2021Based in Tokyo, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI LTD541985–2009
HITACHI VLSI ENG131990–2009
MITSUBISHI ELECTRIC CORP51998–2021
HITACHI ULSI SYS CO LTD42004–2008
ELPIDA MEMORY INC32004–2007
Locations
LocationPatentsSpan
Iruma, JP371989–2009
Hidaka, JP171997–2007
Tokyo, JP42018–2021
Kodaira, JP41985–1991
Nagasaki, JP22009–2010