Inventor
Dengtao Zhao
Inventor
Santa Clara, CA, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores52%
G06FElectric digital data processing17%
H10BElectronic memory devices12%
H01LSemiconductor devices8%
H03MCoding8%
H10DInorganic electric semiconductor devices3%
PatentTitleYear
10,832,785Non-volatile memory with countermeasure for program disturb including purge during precharge202010,825,513Parasitic noise control during sense operations202010,734,070Programming selection devices in non-volatile memory strings202010,726,891Reducing post-read disturb in a nonvolatile memory device202010,643,718Non-volatile memory with countermeasure for program disturb including purge during precharge202010,580,504Non-volatile memory with countermeasure for program disturb including spike during boosting202010,553,298Non-volatile memory with countermeasure for select gate disturb202010,541,037Non-volatile memory with countermeasure for program disturb including delayed ramp down during program verify202010,381,083Bit line control that reduces select gate transistor disturb in erase operations201910,109,352Data retention flags in solid-state drives20189,952,939System and method for lower page data recovery in a solid state drive20189,672,934'Temperature compensation management in solid-state memory'20179,620,220'Data retention flags in solid-state drives'20179,595,347'Data retention monitoring using temperature history in solid state drives'20179,542,258'System and method for error-minimizing voltage threshold selection'20179,275,741'Temperature compensation management in solid-state memory'20169,263,136'Data retention flags in solid-state drives'20169,165,668'Data retention monitoring using temperature history in solid state drives'20159,032,271'System and method for lower page data recovery in a solid state drive'20159,013,920'Systems and methods of write precompensation to extend life of a solid-state memory'20159,007,841'Programming scheme for improved voltage distribution in solid-state memory'20158,966,350'Providing reliability metrics for decoding data in non-volatile storage'20158,966,343'Solid-state drive retention monitor using reference blocks'20158,885,404'Non-volatile storage system with three layer floating gate'20148,638,606'Substrate bias during program of non-volatile storage'20148,481,386'Nanocrystal memories and methods of forming the same'20138,472,255'Compensation of non-volatile memory chip non-idealities by program pulse adjustment'20138,468,424'Method for decoding data in non-volatile storage using reliability metrics based on multiple reads'20138,284,609'Compensation of non-volatile memory chip non-idealities by program pulse adjustment'20128,145,981'Soft bit data transmission for error correction control in non-volatile memory'20127,978,520'Compensation of non-volatile memory chip non-idealities by program pulse adjustment'20117,966,550'Soft bit data transmission for error correction control in non-volatile memory'20117,966,546'Non-volatile memory with soft bit data transmission for error correction control'20117,904,793'Method for decoding data in non-volatile storage using reliability metrics based on multiple reads'20117,797,480'Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics'20107,551,477'Multiple bit line voltages based on distance'20097,535,764'Adjusting resistance of non-volatile memory using dummy memory cells'20097,463,528'Temperature compensation of select gates in non-volatile memory'20087,460,407'Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position'20087,391,650'Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates'20087,342,831'System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008–2011Patents assigned to SANDISK CORP (8)· patent assignee history
2008–2015Based in Sunnyvale, CA, US· patent location history
2010Based in Palo Alto, CA, US· patent location history
2011–2015Patents assigned to SANDISK TECHNOLOGIES INC (10)· patent assignee history
2012–2015Patents assigned to ZHAO DENGTAO (7)· patent assignee history
2013–2020Based in Santa Clara, CA, US· patent location history
2015–2020Patents assigned to WESTERN DIGITAL TECH INC (14)· patent assignee history
2019–2020Patents assigned to SANDISK TECHNOLOGIES LLC (8)· patent assignee history
2019–2020Based in Los Gatos, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| WESTERN DIGITAL TECH INC | 14 | 2015–2020 |
| SANDISK TECHNOLOGIES INC | 10 | 2011–2015 |
| SANDISK CORP | 8 | 2008–2011 |
| SANDISK TECHNOLOGIES LLC | 8 | 2019–2020 |
| ZHAO DENGTAOself | 7 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Santa Clara, California, US | 22 | 2013–2020 |
| Sunnyvale, California, US | 15 | 2008–2015 |
| Los Gatos, California, US | 3 | 2019–2020 |
| Palo Alto, California, US | 1 | 2010 |