Inventor
Dario S. Filoteo, Jr.
Inventor
Singapore, SG
Overview
Patents· 29 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1078%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests11%
H01LSemiconductor devices8%
H05KPrinted circuits3%
PatentTitleYear
9,281,300'Chip scale module package in BGA semiconductor package'20169,034,693'Integrated circuit package with open substrate and method of manufacturing thereof'20159,000,579'Integrated circuit package system with bonding in via'20158,421,221'Integrated circuit heat spreader stacking system'20138,395,254'Integrated circuit package system with heatspreader'20138,138,080'Integrated circuit package system having interconnect stack and external interconnect'20128,097,935'Quad flat package'20128,097,496'Method of forming quad flat package'20128,030,783'Integrated circuit package with open substrate'20118,026,129'Stacked integrated circuits package system with passive components'20118,021,931'Direct via wire bonding and method of assembling the same'20117,928,564'Multichip module package and fabrication method'20117,911,046'Integrated circuit packaging system with interposer'20117,863,730'Array-molded package heat spreader and fabrication method therefor'20117,786,575'Stacked die semiconductor device having circuit tape'20107,759,169'Integrated circuit heat spreader stacking method'20107,687,892'Quad flat package'20107,659,608'Stacked die semiconductor device having circuit tape'20107,626,277'Integrated circuit package with open substrate'20097,622,325'Integrated circuit package system including high-density small footprint system-in-package'20097,619,314'Integrated circuit package system including die stacking'20097,518,226'Integrated circuit packaging system with interposer'20097,445,955'Multichip module package and fabrication method'20087,439,620'Integrated circuit package-in-package system'20087,298,038'Integrated circuit package system including die stacking'20077,008,820'Chip scale package with open substrate'20066,943,057'Multichip module package and fabrication method'20056,875,634'Heat spreader anchoring and grounding method and thermally enhanced PBGA package using the same'20056,737,298'Heat spreader anchoring & grounding method & thermally enhanced PBGA package using the same'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2015Patents assigned to ST ASSEMBLY TEST SERVICES LTD (6)· patent assignee history
2004–2016Based in Singapore, SG· patent location history
2005–2016Patents assigned to STATS CHIPPAC LTD (21)· patent assignee history
2012–2016Patents assigned to FILOTEO JR DARIO S (8)· patent assignee history
2012–2016Patents assigned to MERILO LEO A (5)· patent assignee history
2012–2015Patents assigned to ESPIRITU EMMANUEL (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| STATS CHIPPAC LTD | 21 | 2005–2016 |
| FILOTEO JR DARIO Sself | 8 | 2012–2016 |
| ST ASSEMBLY TEST SERVICES LTD | 6 | 2004–2015 |
| MERILO LEO A | 5 | 2012–2016 |
| ESPIRITU EMMANUEL | 4 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Singapore, SG | 29 | 2004–2016 |