Inventor

Lance W. Dover

Inventor
Fair Oaks, CA, US

Overview

35→
Patents
2003–2021
Patent span
Physics
Primary field (CPC G)

Patents· 35 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing53%
H04LTransmission of digital information, e.g. telegraphic communication20%
G11CStatic stores18%
H03MCoding4%
H03KPulse technique2%
H04WWireless communication networks2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,984,136Secure memory device with unique identifier for authentication202110,936,213Techniques for secure writes by non-privileged users202110,838,879Memory protection based on system state202010,691,806Self-measuring nonvolatile memory device systems and methods202010,637,648Storage device hash production202010,560,263Secure memory arrangements202010,387,336Memory protection based on system state201910,296,421Memory devices and systems with security capabilities201910,176,328Self-measuring nonvolatile memory device systems and methods201910,007,465Remapping in a memory device20189,686,248'Secure shared key sharing systems and methods'20179,613,214'Self-measuring nonvolatile memory devices with remediation capabilities and associated systems and methods'20179,569,622'Self-measuring nonvolatile memory device systems and methods'20179,331,989'Secure shared key sharing systems and methods'20169,146,856'Remapping and compacting in a memory device'20158,225,042'Method and apparatus for preventing foreground erase operations in electrically writable memory devices'20127,885,990'Random telegraph signal noise as a source for random numbers'20117,644,225'Performance or power-optimized code/data storage for nonvolatile memories'20107,577,028'Memory storage technique for a bi-directionally programmable memory device'20097,533,234'Method and apparatus for storing compressed code without an index table'20097,391,345'Storing compressed code on a non-volatile memory'20087,386,654'Non-volatile configuration data storage for a configurable memory'20087,345,914'Use of flash memory blocks outside of the main flash memory array'20087,269,614'Secure hardware random number generator'20077,076,627'Memory control for multiple read requests'20066,920,534'Virtual-port memory and virtual-porting'20056,851,013'Fast program mode'20056,836,853'Non-volatile memory based monotonic counter'20046,834,323'Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory'20046,792,438'Secure hardware random number generator'20046,772,276'Flash memory command abstraction'20046,732,306'Special programming mode with hashing'20046,618,790'Burst suspend and resume with computer memory'20036,609,195'Configuring integrated circuit devices in a data processing system'20036,553,491'Configuring devices in a computer system'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2011Patents assigned to INTEL CORP (19)· patent assignee history
2003–2021Based in Fair Oaks, CA, US· patent location history
2012–2021Patents assigned to MICRON TECHNOLOGY INC (16)· patent assignee history
2012–2015Patents assigned to DOVER LANCE (2)· patent assignee history
2012–2020Based in Citrus Heights, CA, US· patent location history
2015Patents assigned to COOKE JIM (1)· patent assignee history
2015Patents assigned to FEELEY PETER (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP192003–2011
MICRON TECHNOLOGY INC162012–2021
DOVER LANCEself22012–2015
COOKE JIM12015
FEELEY PETER12015
Locations
LocationPatentsSpan
Fair Oaks, California, US262003–2021
Citrus Heights, California, US92012–2020