Inventor
Yi-Hsiung Lin
Inventor
Hsinchu County, TW
Overview
Patents· 32 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%
H10DInorganic electric semiconductor devices22%
H01LSemiconductor devices21%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10BElectronic memory devices3%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
G06FElectric digital data processing2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
Y10TTechnical subjects covered by former us classification2%
A42CManufacturing or trimming head coverings, e.g. hats1%
PatentTitleYear
10,879,176Integrated circuit structure202010,818,473Implanter calibration202010,763,198Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure202010,763,365Metal rail conductors for non-planar semiconductor devices202010,734,321Integrated circuit and method of manufacturing same202010,727,113Methods of forming metal layer structures in semiconductor devices202010,672,665Fin field effect transistor device structure and method for forming the same202010,522,633Methods and structures of novel contact feature201910,504,775Methods of forming metal layer structures in semiconductor devices201910,446,555Buried metal track and methods forming same201910,276,491Interconnect structure and methods thereof201910,170,404Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure201910,134,863Vertical semiconductor device structure and method of forming201810,096,597Re-grown gate structure and fabrication method thereof20189,892,224'Method of forming masks'20189,728,505'Methods and structrues of novel contact feature'20179,691,695'Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure'20179,564,363'Method of forming butted contact'20179,412,595'Systems and methods for intelligent dispatching for wafer processing'20168,298,912'Semiconductor structure and method of manufacturing same'20127,960,036'Semiconductor structure and method of manufacturing same'20117,815,173'Cooler'20107,560,222'Si-containing polymers for nano-pattern device fabrication'20097,553,758'Method of fabricating interconnections of microelectronic device using dual damascene process'20097,488,687'Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers'20097,352,064'Multiple layer resist scheme implementing etch recipe particular to each layer'20087,311,065'Powder fuel engine'20077,091,612'Dual damascene structure and method'20066,949,459'Method of patterning damascene structure in integrated circuit design'20056,750,129'Process for forming fusible links'20046,593,185'Method of forming embedded capacitor structure applied to logic integrated circuit'20036,052,928'Hat ironing machine'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2006Based in Wappingers Falls, NY, US· patent location history
2005–2012Patents assigned to IBM (8)· patent assignee history
2007–2012Patents assigned to LIN YI-HSIUNG (3)· patent assignee history
2009Patents assigned to CHARTERED SEMICONDUCTOR MFG (2)· patent assignee history
2009Patents assigned to SAMSUNG ELECTRONICS CO LTD (2)· patent assignee history
2009–2012Based in Taipei, TW· patent location history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (19)· patent assignee history
2016–2020Based in Hsinchu County, TW· patent location history
2017–2020Based in Hsinchu, TW· patent location history
2019–2020Based in Zhubei City, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 19 | 2016–2020 |
| IBM | 8 | 2005–2012 |
| LIN YI-HSIUNGself | 3 | 2007–2012 |
| CHARTERED SEMICONDUCTOR MFG | 2 | 2009 |
| SAMSUNG ELECTRONICS CO LTD | 2 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu County, TW | 7 | 2016–2020 |
| Hsinchu, TW | 6 | 2017–2020 |
| Zhubei City, TW | 5 | 2019–2020 |
| Taipei, TW | 5 | 2009–2012 |
| Wappingers Falls, New York, US | 3 | 2004–2006 |