Inventor
Chien-Chih Chou
Inventor
New Taipei, TW
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10DInorganic electric semiconductor devices33%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1027%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
PatentTitleYear
11,011,619Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices202110,991,693Boundary region for high-k-metal-gate (HKMG) integration technology202110,950,708Dishing prevention dummy structures for semiconductor devices202110,930,776High voltage LDMOS transistor and methods for manufacturing the same20219,887,302'Schottky barrier diode'20186,734,525'Low stress integrated circuit fusible link'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004Patents assigned to TAIWAN SEMICONDUCTOR MFG (1)· patent assignee history
2004Based in Jubei, TW· patent location history
2018–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (5)· patent assignee history
2018–2021Based in New Taipei, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 5 | 2018–2021 |
| TAIWAN SEMICONDUCTOR MFG | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| New Taipei, TW | 5 | 2018–2021 |
| Jubei, TW | 1 | 2004 |