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Inventor

Gianfranco Ferrante

Inventor
San Giorgio a Cremano, IT

Overview

7→
Patents
2009–2021
Patent span
Physics
Primary field (CPC G)

Patents· 7 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing56%
G11CStatic stores44%
PatentTitleYear
11,132,311Interface for memory having a cache and multiple independent arrays202110,860,474Multilevel addressing202010,534,731Interface for memory having a cache and multiple independent arrays202010,175,908Systems and methods for providing file information in a memory system protocol20199,880,772'Systems and methods for providing file information in a memory system protocol'20188,014,208'Erase verification for flash memory'20117,571,362'Method of managing fails in a non-volatile memory device and relative memory device'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009Patents assigned to CARANNANTE PROCOLO (1)· patent assignee history
2009Patents assigned to CORSI ADAMO (1)· patent assignee history
2009Patents assigned to DI TUORO CONCETTA (1)· patent assignee history
2009Patents assigned to FERRANTE GIANFRANCO (1)· patent assignee history
2009–2021Based in San Giorgio a Cremano, IT· patent location history
2011–2021Patents assigned to MICRON TECHNOLOGY INC (6)· patent assignee history
2011Based in Naples, IT· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC62011–2021
CARANNANTE PROCOLO12009
CORSI ADAMO12009
DI TUORO CONCETTA12009
FERRANTE GIANFRANCOself12009
Locations
LocationPatentsSpan
San Giorgio a Cremano, IT62009–2021
Naples, IT12011