Inventor
Thomas J. Hartswick
Inventor
Underhill, VT, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1027%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H01LSemiconductor devices14%
H10DInorganic electric semiconductor devices14%
C25DProcesses for the electrolytic or electrophoretic production of coatings12%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
PatentTitleYear
10,438,803Semiconductor structures having low resistance paths throughout a wafer201910,177,000Semiconductor structures having low resistance paths throughout a wafer201910,134,670Wafer with plated wires and method of fabricating same20189,691,623'Semiconductor structures having low resistance paths throughout a wafer'20179,620,371'Semiconductor structures having low resistance paths throughout a wafer'20179,478,427'Semiconductor structures having low resistance paths throughout a wafer'20169,312,140'Semiconductor structures having low resistance paths throughout a wafer'20166,627,926'Method of designing and structure for visual and electrical test of semiconductor devices'20036,274,393'Method for measuring submicron images'20016,251,773'Method of designing and structure for visual and electrical test of semiconductor devices'20015,926,738'Interconnects using metal spacers and method for forming same'19995,907,763'Method and device to monitor integrated temperature in a heat cycle process'19995,808,364'Interconnects using metal spacers'19985,723,898'Array protection devices and method'19985,523,253'Array protection devices and fabrication method'19965,420,455'Array fuse damage protection devices and fabrication method'19955,034,348'Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–2019Patents assigned to IBM (17)· patent assignee history
1991–2019Based in Underhill, VT, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 17 | 1991–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Underhill, VT, US | 17 | 1991–2019 |