Inventor
Seigo Kishino
Inventor
Hachioji, JP
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
Y10Sprimary
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests40%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1030%
C30BSingle-crystal growth20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
PatentTitleYear
7,126,194'Method for removing impurities of a semiconductor wafer, semiconductor wafer assembly, and semiconductor device'20064,378,269'Method of manufacturing a single crystal silicon rod'19834,376,657'Method of making fault-free surface zone in semiconductor devices by step-wise heat treating'19834,314,595'Method of forming nondefective zone in silicon single crystal wafer by two stage-heat treatment'19823,951,729'Method for producing single crystals'1976Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1976Patents assigned to HITACHI LTD (1)· patent assignee history
1976–1983Based in Hachioji, JP· patent location history
1982–1983Patents assigned to VLSI TECHNOLOGY RES ASS (3)· patent assignee history
2006Patents assigned to JAPAN SOC PROMOTION MACH IND (1)· patent assignee history
2006Based in Kobe, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| VLSI TECHNOLOGY RES ASS | 3 | 1982–1983 |
| HITACHI LTD | 1 | 1976 |
| JAPAN SOC PROMOTION MACH IND | 1 | 2006 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hachioji, JP | 4 | 1976–1983 |
| Kobe, JP | 1 | 2006 |