Inventor
Daniel C. Murray
Inventor
Morgan Hill, CA, US
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing25%
G11CStatic stores22%
H03KPulse technique21%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%
G01RMeasuring electric variables4%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications3%
A47FSpecial furniture, fittings, or accessories for shops, storehouses, bars, restaurants or the like1%
B62BHand-propelled vehicles, e.g. hand carts or perambulators1%
E03FSewers1%
F16MFrames, casings or beds of engines, machines or apparatus, not specific to engines, machines or apparatus provided for elsewhere1%
PatentTitleYear
11,060,896Flow imaging and monitoring for synchronized management of wide area drainage202110,490,265Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage201910,482,952Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage201910,384,702Resetting cart201910,303,238Dynamic voltage and frequency management based on active processors201910,101,788Dynamic voltage margin recovery20189,703,354'Dynamic voltage and frequency management based on active processors'20179,672,901'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20179,606,605'Dynamic voltage margin recovery'20179,343,139'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20169,304,573'Dynamic voltage and frequency management based on active processors'20169,129,708'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20159,009,451'Instruction type issue throttling upon reaching threshold by adjusting counter increment amount for issued cycle and decrement amount for not issued cycle'20158,848,463'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20148,625,368'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20148,553,488'Performing stuck-at testing using multiple isolation circuits'20138,416,635'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20138,364,936'Processor employing split scheduler in which near, low latency operation dependencies are tracked separate from other operation dependencies'20138,362,805'Power switch ramp rate control using daisy-chained flops'20138,356,221'Transition delay test function logic'20138,289,785'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20128,255,671'Processor employing split scheduler in which near, low latency operation dependencies are tracked separate from other operation dependencies'20128,169,236'Frequency detection mechanism for a clock generation circuit'20128,125,250'Frequency detection mechanism for a clock generation circuit'20128,098,534'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20127,996,662'Floating point status/control register encodings for speculative register field'20117,996,646'Efficient encoding for detecting load dependency on store with misalignment'20117,760,559'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20107,721,066'Efficient encoding for detecting load dependency on store with misalignment'20107,707,477'Checksum calculation'20107,474,571'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20097,355,905'Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage'20087,203,827'Link and fall-through address formation using a program counter portion selected by a specific branch address bit'20076,907,443'Magnitude comparator'20056,874,081'Selection of link and fall-through address using a bit in a branch address for the selection'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2007Based in San Jose, CA, US· patent location history
2008–2019Based in Morgan Hill, CA, US· patent location history
2010–2019Patents assigned to APPLE INC (28)· patent assignee history
2012–2015Patents assigned to MURRAY DANIEL C (11)· patent assignee history
2012–2013Patents assigned to CAMPBELL BRIAN J (4)· patent assignee history
2012–2013Patents assigned to VON KAENEL VINCENT R (4)· patent assignee history
2012–2015Patents assigned to BANNON PETER J (3)· patent assignee history
2019Based in Massillon, OH, US· patent location history
2021Based in Cincinnati, OH, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLE INC | 28 | 2010–2019 |
| MURRAY DANIEL Cself | 11 | 2012–2015 |
| CAMPBELL BRIAN J | 4 | 2012–2013 |
| VON KAENEL VINCENT R | 4 | 2012–2013 |
| BANNON PETER J | 3 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Morgan Hill, California, US | 30 | 2008–2019 |
| San Jose, California, US | 3 | 2005–2007 |
| Cincinnati, OH, US | 1 | 2021 |
| Massillon, OH, US | 1 | 2019 |