Inventor
Valeria Bertacco
Inventor
Ann Arbor, MI, US
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing89%
G01RMeasuring electric variables11%
PatentTitleYear
9,645,882'Field repairable logic'20179,411,007'System and method for statistical post-silicon validation'20168,738,349'Gate-level logic simulator using multiple processor architectures'20148,365,110'Automatic error diagnosis and correction for RTL designs'20138,341,473'Microprocessor and method for detecting faults therein'20128,051,368'Microprocessor and method for detecting faults therein'20117,966,538'Microprocessor and method for detecting faults therein'20116,493,841'Method and apparatus for determining expected values during circuit design verification'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002Based in Stanford, CA, US· patent location history
2011–2014Patents assigned to UNIV MICHIGAN (4)· patent assignee history
2011–2017Based in Ann Arbor, MI, US· patent location history
2012–2017Patents assigned to BERTACCO VALERIA (4)· patent assignee history
2012–2017Patents assigned to AUSTIN TODD MICHAEL (2)· patent assignee history
2013–2017Patents assigned to WAGNER ILYA (2)· patent assignee history
2016–2017Patents assigned to UNIV MICHIGAN REGENTS (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| BERTACCO VALERIAself | 4 | 2012–2017 |
| UNIV MICHIGAN | 4 | 2011–2014 |
| AUSTIN TODD MICHAEL | 2 | 2012–2017 |
| UNIV MICHIGAN REGENTS | 2 | 2016–2017 |
| WAGNER ILYA | 2 | 2013–2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Ann Arbor, MI, US | 7 | 2011–2017 |
| Stanford, California, US | 1 | 2002 |