Inventor

Robert J. Greiner

Inventor

Beaverton, OR, US

Overview

1995–2020

Patent span

Physics

Primary field (CPC G)

Patents· 74 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing61%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use17%

H03KPulse technique5%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%

G05FSystems for regulating electric or magnetic variables3%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%

F04DNon-positive-displacement pumps2%

G01RMeasuring electric variables2%

G11BInformation storage based on relative movement between record carrier and transducer2%

G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes1%

PatentTitleYear

10,635,155Independent power control of processing cores2020 10,613,610Independent power control of processing cores2020 10,534,419Independent power control of processing cores2020 10,095,300Independent power control of processing cores2018 9,841,803'Independent power control of processing cores'2017 9,779,249'Launching a secure kernel in a multiprocessor system'2017 9,507,952'Launching a secure kernel in a multiprocessor system'2016 9,213,865'Launching a secure kernel in a multiprocessor system'2015 9,037,885'Independent power control of processing cores'2015 9,021,279'Independent power control of processing cores'2015 9,021,156'Integrating intellectual property (IP) blocks into a processor'2015 9,003,210'Dynamic voltage transitions'2015 8,996,899'Independent power control of processing cores'2015 8,949,635'Integrated circuit performance improvement across a range of operating conditions and physical constraints'2015 8,935,546'Dynamic voltage transitions'2015 8,874,906'Launching a secure kernel in a multiprocessor system'2014 8,856,568'Independent power control of processing cores'2014 8,756,451'Frequency synthesis methods and systems'2014 8,719,600'Dynamic voltage transitions'2014 8,707,064'Dynamic voltage transitions'2014 8,464,048'Launching a secure kernel in a multiprocessor system'2013 8,423,682'Address space emulation'2013 8,397,090'Operating integrated circuit logic blocks at independent voltages with single voltage supply'2013 8,250,364'Launching a secure kernel in a multiprocessor system'2012 8,214,677'Voltage regulator with suspend mode'2012 8,205,111'Communicating via an in-die interconnect'2012 8,161,280'Launching a secure kernel in a multiprocessor system'2012 8,069,358'Independent power control of processing cores'2011 8,037,326'Power control unit with digitally supplied system parameters'2011 7,996,572'Multi-node chipset lock flow with peer-to-peer non-posted I/O requests'2011 7,949,887'Independent power control of processing cores'2011 7,890,781'Dynamic voltage transitions'2011 7,783,809'Virtualization of pin functionality in a point-to-point interface'2010 7,774,600'Launching a secure kernel in a multiprocessor system'2010 7,770,005'Launching a secure kernel in a multiprocessor system'2010 7,761,723'Processor temperature control interface'2010 7,757,081'Launching a secure kernel in a multiprocessor system'2010 7,725,713'Launching a secure kernel in a multiprocessor system'2010 7,698,552'Launching a secure kernel in a multiprocessor system'2010 7,685,441'Power control unit with digitally supplied system parameters'2010 7,642,764'Voltage regulator with loadline based mostly on dynamic current'2010 7,587,650'Clock jitter detector'2009 7,506,184'Current detection for microelectronic devices using source-switched sensors'2009 7,466,176'Voltage regulator for microelectronic devices using dual edge pulse width modulated control signal'2008 7,449,966'Method and an apparatus to sense supply voltage'2008 7,444,524'Dynamic voltage transitions'2008 7,414,383'Multi-phase voltage regulator with phases ordered by lowest phase current'2008 7,405,551'Method and an apparatus to adjust duty cycle for voltage supply regulation'2008 7,276,942'Method for configurably enabling pulse clock generation for multiple signaling modes'2007 7,237,128'Method and apparatus to dynamically change an operating frequency and operating voltage of an electronic device'2007 7,038,505'Configurable enabling pulse clock generation for multiple signaling modes'2006 7,013,406'Method and apparatus to dynamically change an operating frequency and operating voltage of an electronic device'2006 6,957,352'Processor temperature control interface'2005 6,924,710'Voltage ID based frequency control for clock generating circuit'2005 6,907,487'Enhanced highly pipelined bus architecture'2005 6,880,076'System and method for communicating device information between a device and a controller'2005 6,880,031'Snoop phase in a highly pipelined bus architecture'2005 6,809,606'Voltage ID based frequency control for clock generating circuit'2004 6,807,592'Quad pumped bus architecture and protocol'2004 6,804,735'Response and data phases in a highly pipelined bus architecture'2004 6,742,160'Checkerboard parity techniques for a multi-pumped bus'2004 6,732,242'External bus transaction scheduling system'2004 6,708,269'Method and apparatus for multi-mode fencing in a microprocessor system'2004 6,662,173'Access control of a resource shared between components'2003 6,609,171'Quad pumped bus architecture and protocol'2003 6,601,121'Quad pumped bus architecture and protocol'2003 6,591,319'Glitch protection and detection for strobed data'2003 6,505,262'Glitch protection and detection for strobed data'2003 6,463,494'Method and system for implementing control signals on a low pin count bus'2002 6,446,154'Method and mechanism for virtualizing legacy sideband signals in a hub interface architecture'2002 6,434,650'Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor'2002 6,216,208'Prefetch queue responsive to read request sequences'2001 5,560,029'Data processing system with synchronization coprocessor for multiple threads'1996 5,430,850'Data processing system with synchronization coprocessor for multiple threads'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–1996Based in Chandler, AZ, US· patent location history

2001–2020Patents assigned to INTEL CORP (71)· patent assignee history

2001–2020Based in Beaverton, OR, US· patent location history

2011–2015Patents assigned to GREINER ROBERT (11)· patent assignee history

2011–2015Patents assigned to GUNTHER STEPHEN H (9)· patent assignee history

2011–2015Patents assigned to DEVAL ANANT (7)· patent assignee history

2011–2015Patents assigned to JOURDAN STEPHAN (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	71	2001–2020
GREINER ROBERTself	11	2011–2015
GUNTHER STEPHEN H	9	2011–2015
DEVAL ANANT	7	2011–2015
JOURDAN STEPHAN	7	2011–2015

Locations

Location	Patents	Span
Beaverton, OR, US	72	2001–2020
Chandler, AZ, US	2	1995–1996