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Inventor

Thomas M. Gooding

Inventor
Rochester, MN, US

Overview

71→
Patents
2003–2021
Patent span
Physics
Primary field (CPC G)

Patents· 71 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing74%
H04LTransmission of digital information, e.g. telegraphic communication13%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%
G01CMeasuring distances, levels or bearings2%
G02BOptical elements, systems or apparatus1%
PatentTitleYear
10,977,160Determining instruction execution history in a debugger202110,831,701Configuring compute nodes in a parallel computer using remote direct memory access ('RDMA')202010,810,155Configuring compute nodes in a parallel computer using remote direct memory access ('RDMA')202010,552,297Determining instruction execution history in a debugger202010,474,626Configuring compute nodes in a parallel computer using remote direct memory access ('RDMA')201910,474,625Configuring compute nodes in a parallel computer using remote direct memory access ('RDMA')201910,372,590Determining instruction execution history in a debugger201910,289,329Burst buffer dynamic logical volume sizing in high performance computing environment201910,268,384File transfers between machines without target CPU intervention201910,104,202Collectively loading programs in a multiple program multiple data environment201810,075,326Monitoring file system operations between a client computer and a file server201810,069,674Monitoring file system operations between a client computer and a file server20189,971,713Multi-petascale highly efficient parallel supercomputer20189,639,472'Prefetch list management in a computer system'20179,626,296'Prefetch list management in a computer system'20179,491,259'Collectively loading programs in a multiple program multiple data environment'20169,444,908'Distributing an executable job load file to compute nodes in a parallel computer'20169,413,849'Distributing an executable job load file to compute nodes in a parallel computer'20169,229,782'Collectively loading an application in a parallel computer'20169,086,962'Aggregating job exit statuses of a plurality of compute nodes executing a parallel application'20159,081,501'Multi-petascale highly efficient parallel supercomputer'20159,037,892'System-wide power management control via clock distribution network'20159,003,226'Core file limiter for abnormally terminating processes'20158,996,911'Core file limiter for abnormally terminating processes'20158,943,350'Synchronizing compute node time bases in a parallel computer'20158,943,199'Calculating a checksum with inactive networking components in a computing system'20158,924,763'Synchronizing compute node time bases in a parallel computer'20148,914,498'Calculating a checksum with inactive networking components in a computing system'20148,880,330'Route planning using location/time encoded data from location aware snowplows'20148,881,153'Speculative thread execution with hardware transactional memory'20148,880,329'Route planning using location/time encoded data from location aware snowplows'20148,874,681'Remote direct memory access (‘RDMA’) in a parallel computer'20148,874,722'Interactive tool for visualizing performance data in real-time to enable adaptive performance optimization and feedback'20148,813,037'Debugging a high performance computing program'20148,799,694'Adaptive recovery for parallel reactive power throttling'20148,799,696'Adaptive recovery for parallel reactive power throttling'20148,751,866'Autonomic fault isolation in a highly interconnected system'20148,713,294'Heap/stack guard pages using a wakeup unit'20148,689,221'Speculative thread execution and asynchronous conflict events'20148,655,962'Shared address collectives using counter mechanisms'20148,635,603'Handling debugger breakpoints in a shared instruction system'20148,631,086'Preventing messaging queue deadlocks in a DMA environment'20148,595,554'Reproducibility in a multiprocessor system'20138,516,444'Debugging a high performance computing program'20138,495,655'Messaging in a parallel computer using remote direct memory access (‘RDMA’)'20138,490,113'Messaging in a parallel computer using remote direct memory access (‘RDMA’)'20138,443,287'Interactive tool for visualizing performance data in real-time to enable adaptive performance optimization and feedback'20138,438,571'Thread speculative execution and asynchronous conflict'20138,438,568'Speculative thread execution with hardware transactional memory'20138,412,974'Global synchronization of parallel processors using clock pulse width modulation'20138,261,249'Distributed schemes for deploying an application in a large parallel system'20128,250,383'Temperature threshold application signal trigger for real-time relocation of process'20128,245,002'Call stack protection'20128,140,925'Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan'20128,112,559'Increasing available FIFO space to prevent messaging queue deadlocks in a DMA environment'20128,001,401'Power throttling of collections of computing elements'20117,953,957'Mapping and distributing parallel algorithms to compute nodes in a parallel computer based on temperatures of the compute nodes in a hardware profile and a hardware independent application profile describing thermal characteristics of each parallel algorithm'20117,954,012'Hierarchical debug information collection'20117,941,681'Proactive power management in a parallel computer'20117,930,595'Method and apparatus for analyzing error conditions in a massively parallel computer system by identifying anomalous nodes within a communicator set'20117,877,620'Managing power in a parallel computer'20117,716,407'Executing application function calls in response to an interrupt'20107,673,182'Method and apparatus for obtaining stack traceback data for multiple computing nodes of a massively parallel computer system'20107,480,611'Method and apparatus to increase the usable memory capacity of a logic simulation hardware emulator/accelerator'20097,337,103'Method and apparatus for the automatic correction of faulty wires in a logic simulation hardware emulator / accelerator'20087,272,734'Memory management to enable memory deep power down mode in general computing systems'20077,028,313'Method for transmitting function parameters to a remote node for execution of the function thereon'20066,986,147'Method for transparent, location-independent, remote procedure calls in a heterogeneous network environment'20066,842,728'Time-multiplexing data between asynchronous clock domains within cycle simulation and emulation environments'20056,647,174'Optical fiber transmission bypass device'20036,556,936'Method and apparatus for correlating trace data from asynchronous emulation machines'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2021Patents assigned to IBM (70)· patent assignee history
2003–2021Based in Rochester, MN, US· patent location history
2012–2019Patents assigned to GOODING THOMAS M (20)· patent assignee history
2012–2015Patents assigned to CHEN DONG (7)· patent assignee history
2012–2015Patents assigned to HEIDELBERGER PHILIP (7)· patent assignee history
2013–2019Patents assigned to AHO MICHAEL E (5)· patent assignee history
2014Based in Yorktown Heights, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM702003–2021
GOODING THOMAS Mself202012–2019
CHEN DONG72012–2015
HEIDELBERGER PHILIP72012–2015
AHO MICHAEL E52013–2019
Locations
LocationPatentsSpan
Rochester, Minnesota, US702003–2021
Yorktown Heights, New York, US12014