Inventor
Juergen A. Foerstner
Inventor
Mesa, AZ, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices21%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests18%
G01PMeasuring linear or angular speed, acceleration, deceleration, or shock12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
B81BMicrostructural devices or systems, e.g. micromechanical devices6%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems6%
C23CCoating metallic material3%
H01GCapacitors3%
PatentTitleYear
7,667,334'Integrated matching networks and RF devices that include an integrated matching network'20107,528,062'Integrated matching network and method for manufacturing integrated matching networks'20097,226,802'Tungsten coated silicon fingers'20076,770,569'Low temperature plasma Si or SiGe for MEMS applications'20046,318,174'Sensor and method of use'20016,105,428'Sensor and method of use'20006,013,933'Semiconductor structure having a monocrystalline member overlying a cavity in a semiconductor substrate and process therefor'20005,792,678'Method for fabricating a semiconductor on insulator device'19985,780,352'Method of forming an isolation oxide for silicon-on-insulator technology'19985,719,081'Fabrication method for a semiconductor device on a semiconductor on insulator substrate using a two stage threshold adjust implant'19985,691,224'Method of making BiCMOS circuit'19975,691,226'Method of manufacturing BICMOS integrated circuits'19975,532,175'Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate'19965,273,915'Method for fabricating bipolar junction and MOS transistors on SOI'19935,256,581'Silicon film with improved thickness control'19935,164,326'Complementary bipolar and CMOS on SOI'19925,091,330'Method of fabricating a dielectric isolated area'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2001Patents assigned to MOTOROLA INC (13)· patent assignee history
1992–2010Based in Mesa, AZ, US· patent location history
2004–2010Patents assigned to FREESCALE SEMICONDUCTOR INC (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MOTOROLA INC | 13 | 1992–2001 |
| FREESCALE SEMICONDUCTOR INC | 4 | 2004–2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mesa, AZ, US | 17 | 1992–2010 |