Inventor

Chih-Yuan Ting

Inventor
Taipei, TW

Overview

63→
Patents
2011–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 63 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices34%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1031%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10DInorganic electric semiconductor devices8%
H10BElectronic memory devices1%
H10HInorganic light-emitting semiconductor devices having potential barriers1%
H10KOrganic electric solid-state devices1%
H10NElectric solid-state devices not otherwise provided for1%
C11DDetergent compositions1%
G02BOptical elements, systems or apparatus1%
PatentTitleYear
11,042,254Touch display devices202111,042,062Electronic device202111,018,284Light emitting element and electronic device202110,985,054Interconnect structure and method of forming the same202110,950,495Mitigating pattern collapse202110,923,423Interconnect structure for semiconductor devices202110,861,788Patterning approach for improved via landing profile202010,770,345Integrated circuit and fabrication method thereof202010,755,974Interconnect structure and method of forming same202010,714,383Interconnect structure and method of forming the same202010,679,895Interconnect structure and method of forming the same202010,658,184Pattern fidelity enhancement with directional patterning technology202010,651,373Memory device and fabrication method thereof202010,535,556Integrated circuit with conductive line having line-ends202010,522,391Method and apparatus for back end of line semiconductor device processing201910,515,895Method of preventing pattern collapse201910,504,780Contact plug without seam hole and methods of forming the same201910,483,397Fin field effect transistor and method of forming the same201910,453,794Interconnect structure for semiconductor devices201910,354,949Air gap structure and method201910,290,538Interconnect structure and method of forming the same201910,269,632Semiconductor device and method201910,170,420Patterning approach for improved via landing profile201910,163,689Integrated circuit with conductive line having line-ends201810,157,752Systems and methods for in SITU maintenance of a thin hardmask during an etch process201810,115,630Interconnect structure and method of forming the same201810,043,754Semiconductor device having air gap structures and method of fabricating thereof201810,043,706Mitigating pattern collapse201810,002,784Via corner engineering in trench-first dual damascene process20189,991,200Air gap structure and method20189,966,309Contact plug without seam hole and methods of forming the same20189,929,094'Semiconductor device having air gap structures and method of fabricating thereof'20189,892,960'Interconnect structure and method of forming the same'20189,818,643'Semiconductor interconnect structure and manufacturing method thereof'20179,666,534'Semiconductor interconnect structure and manufacturing method thereof'20179,640,435'Patterning approach for improved via landing profile'20179,627,250'Method and apparatus for back end of line semiconductor device processing'20179,601,348'Interconnect structure and method of forming same'20179,601,344'Method of forming pattern for semiconductor device'20179,583,384'Via corner engineering in trench-first dual damascene process'20179,570,341'Semiconductor device having air gap structures and method of fabricating thereof'20179,564,355'Interconnect structure for semiconductor devices'20179,524,902'Method of forming integrated circuit with conductive line having line-ends'20169,502,287'Method of preventing pattern collapse'20169,496,224'Semiconductor device having air gap structures and method of fabricating thereof'20169,472,448'Contact plug without seam hole and methods of forming the same'20169,437,541'Patterning approach to reduce via to via minimum spacing'20169,412,650'Interconnect structure and method of forming the same'20169,406,589'Via corner engineering in trench-first dual damascene process'20169,401,329'Interconnect structure and method of forming the same'20169,397,047'Interconnect structure and method of forming the same'20169,312,222'Patterning approach for improved via landing profile'20169,287,212'Semiconductor device interconnection structure having dielectric-filled notches'20169,257,298'Systems and methods for in situ maintenance of a thin hardmask during an etch process'20169,153,479'Method of preventing a pattern collapse'20159,142,450'Interconnect structure and method of forming the same'20159,076,729'Method of forming interconnection structure having notches for semiconductor device'20159,048,299'Patterning approach to reduce via to via minimum spacing'20158,962,484'Method of forming pattern for semiconductor device'20158,957,006'Cleaning solution comprising an ether acetate for preventing pattern collapse'20158,927,353'Fin field effect transistor and method of forming the same'20158,697,537'Method of patterning for a semiconductor device'20147,968,506'Wet cleaning stripping of etch residue after trench and via opening formation in dual damascene process'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (12)· patent assignee history
2011–2021Based in Taipei, TW· patent location history
2014–2015Patents assigned to TING CHIH-YUAN (3)· patent assignee history
2014–2015Patents assigned to LEE CHIA YING (2)· patent assignee history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (48)· patent assignee history
2021Patents assigned to INNOLUX CORP (3)· patent assignee history
2021Based in Miao-Li County, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD482016–2021
TAIWAN SEMICONDUCTOR MFG122011–2016
INNOLUX CORP32021
TING CHIH-YUANself32014–2015
LEE CHIA YING22014–2015
Locations
LocationPatentsSpan
Taipei, TW602011–2021
Miao-Li County, TW32021