Inventor
Eric D. Groen
Inventor
Ankeny, IA, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication33%
H03KPulse technique28%
G11CStatic stores8%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses8%
H03MCoding8%
G05FSystems for regulating electric or magnetic variables3%
H03FAmplifiers3%
H04BTransmission3%
H04JMultiplex communication3%
H04QSelecting3%
PatentTitleYear
9,553,566'Hybrid driver circuit'20178,836,381'Pseudo-supply hybrid driver'20148,135,037'Method and apparatus to encode and synchronize a serial interface'20127,885,320'MGT/FPGA clock management system'20117,830,985'Analog front-end having built-in equalization and applications thereof'20107,599,396'Method of encoding and synchronizing a serial interface'20097,480,347'Analog front-end having built-in equalization and applications thereof'20097,406,118'Programmable logic device including programmable multi-gigabit transceivers'20087,313,176'Programmable on chip regulators with bypass'20077,280,590'Receiver termination network and application thereof'20077,227,375'DAC based driver with selectable pre-emphasis signal levels'20077,196,545'High frequency latch'20077,167,410'Memory system and memory device having a serial interface'20077,142,014'High frequency XOR with peaked load stage'20067,116,251'Programmable serializing data path'20067,109,809'Method and circuit for reducing VCO noise'20067,047,457'Testing of a multi-gigabit transceiver'20067,015,838'Programmable serializing data path'20066,976,102'Integrated circuit with auto negotiation'20056,975,132'DAC based driver with selectable pre-emphasis signal levels'20056,956,442'Ring oscillator with peaking stages'20056,882,224'Self-biasing for common gate amplifier'20056,870,390'Tx line driver with common mode idle state and selectable slew rates'20056,690,202'Correction of duty-cycle distortion in communications and other circuits'20046,683,502'Process compensated phase locked loop'20046,507,220'Correction of duty-cycle distortion in communications and other circuits'20036,437,599'Programmable line driver'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2011Patents assigned to XILINX INC (22)· patent assignee history
2002–2010Based in Ames, IA, US· patent location history
2004–2017Based in Ankeny, IA, US· patent location history
2012–2017Patents assigned to MOSYS INC (3)· patent assignee history
2012Patents assigned to BLACK DAVID (1)· patent assignee history
2012Patents assigned to BOECKER CHARLES (1)· patent assignee history
2012Patents assigned to GROEN ERIC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| XILINX INC | 22 | 2002–2011 |
| MOSYS INC | 3 | 2012–2017 |
| BLACK DAVID | 1 | 2012 |
| BOECKER CHARLES | 1 | 2012 |
| GROEN ERICself | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Ankeny, IA, US | 24 | 2004–2017 |
| Ames, IA, US | 3 | 2002–2010 |