Inventor
Douglas F. Pastorello
Inventor
Hudson, NH, US
Overview
Patents· 29 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique22%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses20%
G06FElectric digital data processing16%
H03HImpedance networks, e.g. resonant circuits11%
G01RMeasuring electric variables7%
G06JHybrid computing arrangements7%
H03MCoding4%
H04LTransmission of digital information, e.g. telegraphic communication4%
G04FTime-interval measuring2%
G11CStatic stores2%
PatentTitleYear
10,833,682Calibration of an interpolative divider using a virtual phase-locked loop202010,819,353Spur cancellation in a PLL system with an automatically updated target spur frequency202010,511,312Metastable-free output synchronization for multiple-chip systems and the like20199,588,497'Differential voltage-controlled oscillator analog-to-digital converter using input-referred offset'20178,041,975'Programmable I/O cell capable of holding its state in power-down mode'20118,020,010'Memory power controller'20118,010,819'Microcontroller unit (MCU) with power saving mode'20117,562,275'Tri-level test mode terminal in limited terminal environment'20097,551,009'High-speed divider with reduced power consumption'20097,502,434'Frequency detector including a variable delay filter'20097,441,131'MCU with power saving mode'20087,405,601'High-speed divider with pulse-width control'20087,373,533'Programmable I/O cell capable of holding its state in power-down mode'20087,187,216'Phase selectable divider circuit'20077,113,009'Programmable frequency divider'20066,831,523'Auto-detection between referenceless and reference clock mode of operation'20046,760,854'Method and apparatus for handling a framing error at a serial interface by forcing invalid commands to be read upon determine the command is invalid'20046,657,488'Offset correction and slicing level adjustment for amplifier circuits'20036,557,051'Throughput for a serial interface'20036,531,906'Delay systems and methods using a variable delay SINC filter'20036,522,982'Energy-to-pulse converter systems, devices, and methods wherein the output frequency is greater than the calculation frequency and having output phasing'20036,487,674'Single wire interface for an analog to digital converter'20026,417,792'Single phase bi-directional electrical measurement systems and methods using ADCs'20026,377,198'Definition of physical level of a logic output by a logic input'20026,373,415'Digital phase compensation methods and systems for a dual-channel analog-to-digital converter'20026,369,634'Delay systems and methods using a variable delay sinc filter'20026,304,202'Delay correction system and method for a voltage channel in a sampled data measurement system'20016,271,778'High pass filtering with automatic phase equalization'20015,923,273'Reduced power FIR filter'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999Patents assigned to CRYSTAL SEMICONDUCTOR CORP (1)· patent assignee history
1999–2020Based in Hudson, NH, US· patent location history
2001–2004Patents assigned to CIRRUS LOGIC INC (11)· patent assignee history
2003–2020Patents assigned to SILICON LAB INC (15)· patent assignee history
2008–2011Patents assigned to SILICON LAB (2)· patent assignee history
2017Based in Nashua, NH, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON LAB INC | 15 | 2003–2020 |
| CIRRUS LOGIC INC | 11 | 2001–2004 |
| SILICON LAB | 2 | 2008–2011 |
| CRYSTAL SEMICONDUCTOR CORP | 1 | 1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hudson, NH, US | 28 | 1999–2020 |
| Nashua, NH, US | 1 | 2017 |