Inventor
Chih-Yu Lai
Inventor
Tainan, TW
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices30%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation29%
H10DInorganic electric semiconductor devices12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
H10HInorganic light-emitting semiconductor devices having potential barriers3%
H10KOrganic electric solid-state devices3%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution3%
A47CChairs1%
PatentTitleYear
10,868,050Backside illuminated image sensor with negatively charged layer202010,868,058Photodiode gate dielectric protection layer202010,325,956Deep trench isolation shrinkage method for enhanced device performance201910,170,539Stacked capacitor with enhanced capacitance201910,163,947Photodiode gate dielectric protection layer201810,163,949Image device having multi-layered refractive layer on back surface201810,074,612Method for forming alignment marks and structure of same20189,871,095'Stacked capacitor with enhanced capacitance and method of manufacturing the same'20189,812,477'Photodiode gate dielectric protection layer'20179,754,993'Deep trench isolations and methods of forming the same'20179,704,904'Deep trench isolation structures and methods of forming same'20179,659,981'Backside illuminated image sensor with negatively charged layer'20179,653,507'Deep trench isolation shrinkage method for enhanced device performance'20179,627,326'Method for forming alignment marks and structure of same'20179,425,343'Mechanisms for forming image sensor device'20169,412,781'Photodiode gate dielectric protection layer'20169,355,964'Method for forming alignment marks and structure of same'20169,281,331'High dielectric constant structure for the vertical transfer gates of a complementary metal-oxide semiconductor (CMOS) image sensor'20169,252,296'Semiconductor device with compressive layers'20169,190,441'Image sensor trench isolation with conformal doping'20159,147,710'Photodiode gate dielectric protection layer'20159,059,057'Image sensor having compressive layers'20158,853,811'Image sensor trench isolation with conformal doping'20148,802,457'Backside surface treatment of semiconductor chips'20148,778,807'Method of reducing delamination in the fabrication of small-pitch devices'20148,048,813'Method of reducing delamination in the fabrication of small-pitch devices'20117,614,697'Coupling mechanism interposed between a seat and a back of a chair to prevent a reclining motion of the back from tilting the seat'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009Based in Taibao, TW· patent location history
2011–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (8)· patent assignee history
2011–2020Based in Tainan, TW· patent location history
2014–2015Patents assigned to LAI CHIH-YU (4)· patent assignee history
2014–2015Patents assigned to WU CHENG-TA (4)· patent assignee history
2014–2015Patents assigned to TSAI CHIA-SHIUNG (3)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (18)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 18 | 2015–2020 |
| TAIWAN SEMICONDUCTOR MFG | 8 | 2011–2016 |
| LAI CHIH-YUself | 4 | 2014–2015 |
| WU CHENG-TA | 4 | 2014–2015 |
| TSAI CHIA-SHIUNG | 3 | 2014–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tainan, TW | 26 | 2011–2020 |
| Taibao, TW | 1 | 2009 |