Inventor

Jay A. Kuhn

Inventor

Seattle, WA, US

Overview

2003–2020

Patent span

Physics

Primary field (CPC G)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Kprimary

G06KGraphical data reading36%

G01RMeasuring electric variables11%

H01QAntennas, i.e. radio aerials8%

G05FSystems for regulating electric or magnetic variables6%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems6%

H03HImpedance networks, e.g. resonant circuits6%

H03KPulse technique6%

H04QSelecting6%

G11CStatic stores3%

H03DDemodulation or transference of modulation from one carrier to another3%

PatentTitleYear

10,713,549RFID tag rectifiers with bias current reuse2020 10,572,789Impedance-change mitigation in RFID tags2020 RE047755Self-tuning of RFID tags using nonuniform impedance steps2019 10,445,535RFID tag clock frequency reduction during tuning2019 10,002,266RFID tag clock frequency reduction during tuning2018 9,886,658'Impedance-change mitigation in RFID tags'2018 9,607,191'RFID tag memory check using wireless margin read commands'2017 9,349,090'Self tuning RFID tags'2016 9,087,282'Self-tuning of RFID tags using nonuniform impedance steps'2015 9,000,835'Hot RF rectifiers for RFID applications'2015 8,952,792'Self tuning RFID tags'2015 8,326,256'RFID tag with MOS bipolar hybrid rectifier'2012 8,072,329'Voltage regulators using a resistive chain to bias a native transistor'2011 7,808,387'Voltage reference circuit with low-power bandgap'2010 7,667,231'Automatic on-die defect isolation'2010 7,394,308'Circuit and method for implementing a low supply voltage current reference'2008 7,312,622'Wafer level testing for RFID tags'2007 7,307,528'RFID tag design with circuitry for wafer level testing'2007 7,233,274'Capacitive level shifting for analog signal processing'2007 6,975,695'Circuit for correction of differential signal path delays in a PLL'2005 6,617,883'Dual differential input comparators with integrated phase detector'2003 6,617,901'Master/dual-slave D type flip-flop'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2008Patents assigned to CYPRESS SEMICONDUCTOR CORP (4)· patent assignee history

2003–2020Based in Seattle, WA, US· patent location history

2007–2020Patents assigned to IMPINJ INC (18)· patent assignee history

2011–2012Patents assigned to KUHN JAY A (2)· patent assignee history

2011–2015Patents assigned to SRINIVAS SHAILENDRA (2)· patent assignee history

2015Patents assigned to DIORIO CHRISTOPHER J (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IMPINJ INC	18	2007–2020
CYPRESS SEMICONDUCTOR CORP	4	2003–2008
KUHN JAY Aself	2	2011–2012
SRINIVAS SHAILENDRA	2	2011–2015
DIORIO CHRISTOPHER J	1	2015

Locations

Location	Patents	Span
Seattle, Washington, US	22	2003–2020