Inventor
Claude Ortolland
Inventor
Peekskill, NY, US
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1028%
C23CCoating metallic material3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
B82YSpecific uses or applications of nanostructures1%
H10KOrganic electric solid-state devices1%
PatentTitleYear
11,101,357Asymmetric high-k dielectric for reducing gate induced drain leakage202110,734,492Asymmetric high-k dielectric for reducing gate induced drain leakage202010,381,452Asymmetric high-k dielectric for reducing gate induced drain leakage201910,374,048Asymmetric high-k dielectric for reducing gate induced drain leakage201910,367,072Asymmetric high-k dielectric for reducing gate induced drain leakage201910,170,304Self-aligned nanotube structures20199,953,873Methods of modulating the morphology of epitaxial semiconductor material20189,922,831'Asymmetric high-k dielectric for reducing gate induced drain leakage'20189,871,057'Field-effect transistors with a non-relaxed strained channel'20189,859,122'Asymmetric high-k dielectric for reducing gate induced drain leakage'20189,837,319Asymmetric high-K dielectric for reducing gate induced drain leakage20179,831,084Hydroxyl group termination for nucleation of a dielectric metallic oxide20179,768,071'Asymmetric high-K dielectric for reducing gate induced drain leakage'20179,722,045'Buffer layer for modulating Vt across devices'20179,721,843'Asymmetric high-k dielectric for reducing gate induced drain leakage'20179,685,379'Asymmetric high-k dielectric for reducing gate induced drain leakage'20179,620,384'Control of O-ingress into gate stack dielectric layer using oxygen permeable layer'20179,577,061'Asymmetric high-K dielectric for reducing gate induced drain leakage'20179,570,354'Asymmetric high-K dielectric for reducing gate induced drain leakage'20179,559,010'Asymmetric high-k dielectric for reducing gate induced drain leakage'20179,543,213'Asymmetric high-k dielectric for reducing gate induced drain leakage'20179,412,667'Asymmetric high-k dielectric for reducing gate induced drain leakage'20169,373,501'Hydroxyl group termination for nucleation of a dielectric metallic oxide'20169,269,786'Silicon nitride layer deposited at low temperature to prevent gate dielectric regrowth high-K metal gate field effect transistors'20169,166,014'Gate electrode with stabilized metal semiconductor alloy-semiconductor stack'20159,034,749'Gate electrode with stabilized metal semiconductor alloy-semiconductor stack'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2019Patents assigned to IBM (18)· patent assignee history
2015–2019Patents assigned to GLOBALFOUNDRIES INC (7)· patent assignee history
2015–2021Based in Peekskill, NY, US· patent location history
2018–2019Based in Garrison, NY, US· patent location history
2018Based in Hopewell Junction, NY, US· patent location history
2020–2021Patents assigned to TESSERA INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 18 | 2015–2019 |
| GLOBALFOUNDRIES INC | 7 | 2015–2019 |
| TESSERA INC | 2 | 2020–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Peekskill, New York, US | 23 | 2015–2021 |
| Garrison, New York, US | 2 | 2018–2019 |
| Hopewell Junction, New York, US | 1 | 2018 |