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Inventor

Bharan Giridhar

Inventor
Ann Arbor, MI, US

Overview

4→
Patents
2015–2019
Patent span
Physics
Primary field (CPC G)

Patents· 4 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores75%
H03KPulse technique25%
PatentTitleYear
10,217,494Global bit line pre-charging and data latching in multi-banked memories using a delayed reset latch20199,490,779'Dynamic circuitry using pulse amplification to reduce metastability'20169,275,702'Memory circuitry including read voltage boost'20169,036,405'Memory sense amplifier with multiple modes of operation'2015

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2015–2016Patents assigned to UNIV MICHIGAN (2)· patent assignee history
2015Patents assigned to BLAAUW DAVID THEODORE (1)· patent assignee history
2015Patents assigned to GIRIDHAR BHARAN (1)· patent assignee history
2015Patents assigned to SYLVESTER DENNIS MICHAEL (1)· patent assignee history
2015–2016Based in Ann Arbor, MI, US· patent location history
2019Patents assigned to APPLE INC (1)· patent assignee history
2019Based in Fremont, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
UNIV MICHIGAN22015–2016
APPLE INC12019
BLAAUW DAVID THEODORE12015
GIRIDHAR BHARANself12015
SYLVESTER DENNIS MICHAEL12015
Locations
LocationPatentsSpan
Ann Arbor, MI, US32015–2016
Fremont, California, US12019