Inventor
Monica R. Nofal
Inventor
Los Altos, CA, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
6,691,221'Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel execution'20046,247,124'Branch prediction entry with target line index calculated using relative position of second operation of two step branch operation in a line of instructions'20015,954,815'Invalidating instructions in fetched instruction blocks upon predicted two-step branch operations with second operation relative target address'19995,604,909'Apparatus for processing instructions in a computing system'19975,537,538'Debug mode for a superscalar RISC processor'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–1999Patents assigned to SILICON GRAPHICS INC (2)· patent assignee history
1996–2004Based in Los Altos, CA, US· patent location history
1997Patents assigned to SILICON GRAPHICS COMPUTER SYST (1)· patent assignee history
2001–2004Patents assigned to MIPS TECH INC (2)· patent assignee history
2004Patents assigned to TOSHIBA KK (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MIPS TECH INC | 2 | 2001–2004 |
| SILICON GRAPHICS INC | 2 | 1996–1999 |
| SILICON GRAPHICS COMPUTER SYST | 1 | 1997 |
| TOSHIBA KK | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Los Altos, California, US | 5 | 1996–2004 |