Inventor
Padmaraj Sanjeevarao
Inventor
Austin, TX, US
Overview
Patents· 10 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores69%
G06FElectric digital data processing15%
G01RMeasuring electric variables8%
H03KPulse technique8%
PatentTitleYear
11,049,539Magnetoresistive random access memory (MRAM) with OTP cells202110,573,364Magnetic disturb diagnostic system for MRAM20209,396,780'Decoder'20168,913,436'Non-volatile memory (NVM) with word line driver/decoder using a charge pump voltage'20148,737,137'Flash memory with bias voltage for word line/row driver'20148,625,365'Memory device and method using encode values for access error condition detection'20147,733,126'Negative voltage generation'20107,701,785'Memory with high speed sensing'20107,692,989'Non-volatile memory having a static verify-read output data path'20107,055,118'Scan chain verification using symbolic simulation'2006Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2006Based in Sunnyvale, CA, US· patent location history
2010–2016Patents assigned to FREESCALE SEMICONDUCTOR INC (7)· patent assignee history
2010–2021Based in Austin, TX, US· patent location history
2014Patents assigned to SANJEEVARAO PADMARAJ (3)· patent assignee history
2014Patents assigned to CHRUDIMSKY DAVID W (2)· patent assignee history
2014Patents assigned to CHOY JON S (1)· patent assignee history
2020–2021Patents assigned to NXP USA INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FREESCALE SEMICONDUCTOR INC | 7 | 2010–2016 |
| SANJEEVARAO PADMARAJself | 3 | 2014 |
| CHRUDIMSKY DAVID W | 2 | 2014 |
| NXP USA INC | 2 | 2020–2021 |
| CHOY JON S | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 9 | 2010–2021 |
| Sunnyvale, California, US | 1 | 2006 |