Inventor
Diyanesh B. Chinnakkonda Vidyapoornachary
Inventor
Bangalore, IN
Overview
Patents· 70 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing49%
G11CStatic stores28%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use11%
H04LTransmission of digital information, e.g. telegraphic communication4%
G05DSystems for controlling or regulating non-electric variables2%
H03MCoding2%
H04WWireless communication networks2%
H05KPrinted circuits2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications2%
G01RMeasuring electric variables1%
PatentTitleYear
10,762,979Data retention in storage drives202010,740,177Optimizing error correcting code in three-dimensional stacked memory202010,725,678Power management for memory subsystems202010,628,248Autonomous dram scrub and error counting202010,545,824Selective error coding202010,534,545Three-dimensional stacked memory optimizations for latency and power202010,528,288Three-dimensional stacked memory access optimization202010,452,470In-channel memory mirroring201910,446,255Reference voltage calibration in memory during runtime201910,326,773Ensuring the credibility of devices for global attestation201910,304,501Implementing DRAM refresh power optimization during long idle mode201910,255,986Assessing in-field reliability of computer memories201910,248,502Correcting an error in a memory device201910,228,999Memory scrubbing in a mirrored memory system to reduce system power consumption201910,223,200Memory scrubbing in a mirrored memory system to reduce system power consumption201910,218,713Global attestation procedure201910,168,936Memory system power management201910,140,186Memory error recovery201810,078,447Memory activity driven adaptive performance measurement201810,075,440Multi-party secure global attestation201810,067,672Memory activity driven adaptive performance measurement201810,069,829Multi-party secure global attestation201810,057,276Global attestation procedure201810,055,295Using spare capacity in solid state drives201810,048,880Efficient scrubbing of mirrored memory201810,031,180Leakage power characterization at high temperatures for an integrated circuit201810,025,508Concurrent upgrade and backup of non-volatile memory201810,007,456Efficient scrubbing of mirrored memory20189,996,411In-channel memory mirroring20189,965,017System and method for conserving energy in non-volatile dual inline memory modules20189,940,204Memory error recovery20189,921,623'Implementing DIMM air flow baffle'20189,915,987'Implementing DIMM air flow baffle'20189,891,990'Memory scrubbing in a mirrored memory system to reduce system power consumption'20189,886,200'Concurrent upgrade and backup of non-volatile memory'20189,875,036Concurrent upgrade and backup of non-volatile memory20189,864,653'Memory scrubbing in a mirrored memory system to reduce system power consumption'20189,864,537'Memory system power management'20189,858,145'Selective error coding'20189,792,209'Method and apparatus for cache memory data processing'20179,760,437'Error correction based on thermal profile of flash memory device'20179,760,504'Nonvolatile memory data security'20179,734,095'Nonvolatile memory data security'20179,710,381'Method and apparatus for cache memory data processing'20179,703,630'Selective error coding'20179,684,465'Memory power management and data consolidation'20179,645,757'Computer memory data security'20179,606,741'Memory power management and data consolidation'20179,606,939'Memory data security'20179,606,944'System and method for computer memory with linked paths'20179,576,682'Traffic and temperature based memory testing'20179,575,904'Memory data security'20179,575,671'Read distribution in a three-dimensional stacked memory based on thermal profiles'20179,570,199'Traffic and temperature based memory testing'20179,557,930'Security for memory module data'20179,529,543'Concurrent upgrade and backup of non-volatile memory'20169,501,432'System and method for computer memory with linked paths'20169,495,248'Using spare capacity in solid state drives'20169,471,239'Memory power management and data consolidation'20169,471,236'Security for memory module data'20169,471,428'Using spare capacity in solid state drives'20169,436,401'Computer memory data security'20169,436,563'Memory system for mirroring data'20169,430,344'Memory system for mirroring data'20169,378,104'Mirroring in three-dimensional stacked memory'20169,361,195'Mirroring in three-dimensional stacked memory'20169,330,737'Allocating memory address space between DIMMs using memory controllers'20169,324,388'Allocating memory address space between DIMMs using memory controllers'20169,116,702'Computer memory power management'20159,116,700'Computer memory power management'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2020Patents assigned to IBM (68)· patent assignee history
2015–2020Based in Bangalore, IN· patent location history
2016Patents assigned to GLOBALFOUNDRIES INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 68 | 2015–2020 |
| GLOBALFOUNDRIES INC | 2 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Bangalore, IN | 70 | 2015–2020 |