Inventor

Jerry Chang-Jui Kao

Inventor

Taipei, TW

Overview

42→

Patents

2007–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 42 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing23%

H03KPulse technique18%

H10DInorganic electric semiconductor devices15%

H01LSemiconductor devices13%

G11CStatic stores6%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%

G01RMeasuring electric variables5%

H04LTransmission of digital information, e.g. telegraphic communication4%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%

PatentTitleYear

10,867,104Isolation circuit between power domains2020 10,824,784System and method of timing characterization for semiconductor circuit2020 10,740,531Integrated circuit, system for and method of forming an integrated circuit2020 10,741,539Standard cells and variations thereof within a standard cell library2020 10,735,001Level shifter circuit and method of operating the same2020 10,685,162Layout for integrated circuit and the integrated circuit2020 10,686,428Cell of transmission gate free circuit and integrated circuit layout including the same2020 10,664,565Method and system of expanding set of standard cells which comprise a library2020 10,530,345Flip-flop with delineated layout for reduced footprint2020 10,326,430Low power flip flop circuit2019 10,270,430Cell of transmission gate free circuit and integrated circuit and integrated circuit layout including the same2019 10,270,432Flip-flop with delineated layout for reduced footprint2019 10,163,883Layout method for integrated circuit and layout of the integrated circuit2018 9,984,192Cell having shifted boundary and boundary-shift scheme2018 9,853,630Skew-tolerant flip-flop2017 9,641,161'Flip-flop with delineated layout for reduced footprint'2017 9,564,896'Post-silicon tuning in voltage control of semiconductor integrated circuits'2017 9,509,301'Voltage control of semiconductor integrated circuits'2016 9,501,602'Electromigration-aware layout generation'2016 9,405,883'Power rail for preventing DC electromigration'2016 9,367,660'Electromigration-aware layout generation'2016 9,311,440'System and method of electromigration avoidance for automatic place-and-route'2016 9,262,573'Cell having shifted boundary and boundary-shift scheme'2016 9,201,107'Cell characterization with Miller capacitance'2015 9,171,926'Channel doping extension beyond cell boundaries'2015 9,165,882'Power rail for preventing DC electromigration'2015 9,152,751'Metal lines for preventing AC electromigration'2015 9,047,433'Cell and macro placement on fin grid'2015 8,937,358'Channel doping extension beyond cell boundaries'2015 8,847,284'Integrated circuit with standard cells'2014 8,499,274'Computer implemented system and method for leakage calculation'2013 8,289,063'Clock distribution network architecture with clock skew management'2012 7,956,664'Clock distribution network architecture with clock skew management'2011 7,880,507'Circular edge detector'2011 7,759,980'Circular edge detector for measuring timing of data signals'2010 7,760,565'Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance'2010 7,719,317'Clock distribution network architecture with resonant clock gating'2010 7,719,316'Clock distribution network architecture for resonant-clocked systems'2010 7,668,037'Storage array including a local clock buffer with programmable timing'2010 7,545,690'Method for evaluating memory cell performance'2009 7,349,271'Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance'2008 7,268,590'Method and apparatus for implementing subthreshold leakage reduction in LSDL'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2011Patents assigned to IBM (7)· patent assignee history

2007Based in Rochester, MN, US· patent location history

2008–2012Based in Ann Arbor, MI, US· patent location history

2010–2012Patents assigned to UNIV MICHIGAN (4)· patent assignee history

2012–2016Patents assigned to KAO JERRY (2)· patent assignee history

2013–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (8)· patent assignee history

2013–2020Based in Taipei, TW· patent location history

2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (23)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	23	2015–2020
TAIWAN SEMICONDUCTOR MFG	8	2013–2016
IBM	7	2007–2011
UNIV MICHIGAN	4	2010–2012
KAO JERRYself	2	2012–2016

Locations

Location	Patents	Span
Taipei, TW	31	2013–2020
Ann Arbor, MI, US	10	2008–2012
Rochester, Minnesota, US	1	2007