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Inventor

Vani Verma

Inventor
Sunnyvale, CA, US

Overview

13→
Patents
2001–2013
Patent span
Electricity
Primary field (CPC H)

Patents· 13 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1041%
G06KGraphical data reading11%
H10BElectronic memory devices11%
H10DInorganic electric semiconductor devices11%
G01RMeasuring electric variables7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
B29CShaping or joining of plastics4%
G05BControl or regulating systems in general4%
Y02PClimate change mitigation technologies in the production or processing of goods4%
PatentTitleYear
8,395,246'Two-sided die in a four-sided leadframe based package'20138,349,655'Method of fabricating a two-sided die in a four-sided leadframe based package'20138,058,099'Method of fabricating a two-sided die in a four-sided leadframe based package'20117,432,599'Memory module having interconnected and stacked integrated circuits'20087,391,104'Non-stick detection method and mechanism for array molded laminate packages'20087,105,377'Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process'20067,005,730'Memory module having interconnected and stacked integrated circuits'20066,853,202'Non-stick detection method and mechanism for array molded laminate packages'20056,731,011'Memory module having interconnected and stacked integrated circuits'20046,730,532'Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process'20046,576,491'Methods for producing high reliability lead frame and packaging semiconductor die using such lead frame'20036,562,272'Apparatus and method for delamination-resistant, array type molding of increased mold cap size laminate packages'20036,331,728'High reliability lead frame and packaging technology containing the same'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2008Patents assigned to CYPRESS SEMICONDUCTOR CORP (7)· patent assignee history
2001–2013Based in Sunnyvale, CA, US· patent location history
2004–2006Patents assigned to MATRIX SEMICONDUCTOR INC (2)· patent assignee history
2011–2013Patents assigned to SANDISK TECHNOLOGIES INC (3)· patent assignee history
2011–2013Patents assigned to TAKIAR HEM (3)· patent assignee history
2011–2013Patents assigned to VERMA VANI (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CYPRESS SEMICONDUCTOR CORP72001–2008
SANDISK TECHNOLOGIES INC32011–2013
TAKIAR HEM32011–2013
VERMA VANIself32011–2013
MATRIX SEMICONDUCTOR INC22004–2006
Locations
LocationPatentsSpan
Sunnyvale, California, US132001–2013