Inventor
Masaaki Kuzuhara
Inventor
Tokyo, JP
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices76%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
B82YSpecific uses or applications of nanostructures3%
H10BElectronic memory devices3%
H10HInorganic light-emitting semiconductor devices having potential barriers3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
PatentTitleYear
8,653,561'III-nitride semiconductor electronic device, and method of fabricating III-nitride semiconductor electronic device'20147,973,335'Field-effect transistor having group III nitride electrode structure'20117,859,014'Semiconductor device'20107,615,868'Electrode, method for producing same and semiconductor device using same'20097,459,788'Ohmic electrode structure of nitride semiconductor device'20087,323,783'Electrode, method for producing same and semiconductor device using same'20087,256,432'Field-effect transistor'20077,071,526'Semiconductor device having Schottky junction electrode'20066,765,241'Group III nitride semiconductor device of field effect transistor type having reduced parasitic capacitances'20046,552,373'Hetero-junction field effect transistor having an intermediate layer'20036,534,790'Compound semiconductor field effect transistor'20036,492,669'Semiconductor device with schottky electrode having high schottky barrier'20026,483,135'Field effect transistor'20026,465,814'Semiconductor device'20026,441,391'Semiconductor device having drain and gate electrodes formed to lie along few degrees of direction in relation to the substrate'20026,440,822'Method of manufacturing semiconductor device with sidewall metal layers'20026,255,673'Hetero-junction field effect transistor'20016,100,571'Fet having non-overlapping field control electrode between gate and drain'20005,596,211'Field effect transistor having a graded bandgap InGaAsP channel formed of a two-dimensional electron gas'19975,504,353'Field effect transistor'19965,466,955'Field effect transistor having an improved transistor characteristic'19955,453,631'Field effect transistor having a multi-layer channel'19955,373,168'Two-dimensional electron gas field effect transistor including an improved InGaAs channel layer'19945,272,372'High speed non-volatile programmable read only memory device fabricated by using selective doping technology'19935,138,405'Quasi one-dimensional electron gas field effect transistor'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2011Patents assigned to NEC CORP (23)· patent assignee history
1992–2011Based in Tokyo, JP· patent location history
2002Patents assigned to NEC COMPOUND SEMICONDUCTOR (1)· patent assignee history
2004Based in Minato-ku, JP· patent location history
2014Patents assigned to AKITA KATSUSHI (1)· patent assignee history
2014Patents assigned to HASHIMOTO SHIN (1)· patent assignee history
2014Patents assigned to KUZUHARA MASAAKI (1)· patent assignee history
2014Based in Fukui, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEC CORP | 23 | 1992–2011 |
| AKITA KATSUSHI | 1 | 2014 |
| HASHIMOTO SHIN | 1 | 2014 |
| KUZUHARA MASAAKIself | 1 | 2014 |
| NEC COMPOUND SEMICONDUCTOR | 1 | 2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 23 | 1992–2011 |
| Fukui, JP | 1 | 2014 |
| Minato-ku, JP | 1 | 2004 |