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Inventor

Sang-Seok Kang

Inventor
Suwon-si, KR

Overview

60→
Patents
1999–2017
Patent span
Physics
Primary field (CPC G)

Patents· 60 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores66%
H10DInorganic electric semiconductor devices7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H03KPulse technique5%
G01RMeasuring electric variables3%
G05FSystems for regulating electric or magnetic variables3%
G06FElectric digital data processing3%
H10BElectronic memory devices3%
H01HElectric switches1%
H04QSelecting1%
PatentTitleYear
9,672,891'Memory device, memory module including the memory device, method of fabricating the memory module, and method of repairing the memory module'20179,286,956'Memory device, memory module including the memory device, method of fabricating the memory module, and method of repairing the memory module'20169,026,870'Memory module and a memory test system for testing the same'20158,619,484'Semiconductor device, method of adjusting load capacitance for the same, and semiconductor system including the same'20138,477,553'Fuse circuit and semiconductor device having the same'20138,441,877'Semiconductor memory devices including burn-in test circuits'20138,411,520'Semiconductor memory device and method of reducing consumption of standby current therein'20138,228,736'Mobile system on chip (SoC) and mobile terminal using the mobile SoC, and method for refreshing a memory in the mobile SoC'20128,208,317'Semiconductor memory device'20128,144,539'Semiconductor memory device for self refresh and memory system having the same'20128,102,689'Semiconductor memory device having dummy sense amplifiers and methods of utilizing the same'20128,015,459'Semiconductor memory device and method of performing a memory operation'20117,675,316'Semiconductor memory device including on die termination circuit and on die termination method thereof'20107,657,800'Semiconductor memory device and method of performing a memory operation'20107,649,760'Semiconductor memory device having dummy sense amplifiers and methods of utilizing the same'20107,624,317'Parallel bit test circuit and method for semiconductor memory device'20097,569,904'Semiconductor device having a plurality of temperature sensors and semiconductor device control method using the plurality of temperature sensors'20097,558,993'Test apparatus for semiconductor memory device'20097,483,320'Data input/output method of semiconductor memory device and semiconductor memory device for the same'20097,466,616'Bit line sense amplifier and method thereof'20087,460,428'Dynamic random access memory and communications terminal including the same'20087,391,254'Circuit and method of generating internal supply voltage in semiconductor memory device'20087,295,488'Apparatus and methods for generating a column select line signal in semiconductor memory device'20077,173,872'Method and apparatus for controlling a high voltage generator in a wafer burn-in test'20077,161,407'Fuse circuit with controlled fuse burn out and method thereof'20077,116,127'Circuit with fuse and semiconductor device having the same circuit'20067,075,854'Semiconductor memory device, write control circuit and write control method for the same'20067,057,217'Fuse arrangement and integrated circuit device using the same'20067,016,248'Method and apparatus for controlling a high voltage generator in a wafer burn-in test'20066,972,612'Semiconductor device with malfunction control circuit and controlling method thereof'20056,909,654'Bit line pre-charge circuit of semiconductor memory device'20056,906,545'Voltage measurement device tolerant of undershooting or overshooting input voltage of pad'20056,898,139'Integrated circuit memory devices and operating methods that are configured to output data bits at a lower rate in a test mode of operation'20056,861,682'Laser link structure capable of preventing an upper crack and broadening an energy window of a laser beam, and fuse box using the same'20056,850,450'Fuse box including make-link and redundant address decoder having the same, and method for repairing defective memory cell'20056,788,132'Voltage and time control circuits'20046,751,148'Circuit for generating control signal using make-link type fuse'20046,658,612'Test signal generating circuit of a semiconductor device with pins receiving signals of multiple voltage levels and method for invoking test modes'20036,643,191'Semiconductor device having chip selection circuit and method of generating chip selection signal'20036,522,597'Semiconductor memory device and bit line isolation gate arrangement method thereof'20036,498,526'Fuse circuit and program status detecting method thereof'20026,490,222'Decoding circuit for controlling activation of wordlines in a semiconductor memory device'20026,483,373'Input circuit having signature circuits in parallel in semiconductor device'20026,459,636'Mode selection circuit for semiconductor memory device'20026,452,828'Dynamic random access memory (DRAM) having a structure for emplying a word line low voltage'20026,438,042'Arrangement of bitline boosting capacitor in semiconductor memory device'20026,396,756'Integrated circuit memory devices including transmission parts that are adjacent input/output selection parts'20026,392,938'Semiconductor memory device and method of identifying programmed defective address thereof'20026,346,738'Fuse option circuit of integrated circuit and method thereof'20026,345,011'Input/output line structure of a semiconductor memory device'20026,225,818'Integrated circuits including function identification circuits having operating modes that identify corresponding functions of the integrated circuits'20016,215,723'Semiconductor memory device having sequentially disabling activated word lines'20016,140,704'Integrated circuit memory devices with improved twisted bit-line structures'20006,111,457'Internal power supply circuit for use in a semiconductor device'20006,084,808'Circuits and methods for burn-in of integrated circuits using potential differences between adjacent main word lines'20006,028,797'Multi-bank integrated circuit memory devices having cross-coupled isolation and precharge circuits therein'20005,949,724'Burn-in stress circuit for semiconductor memory device'19995,929,696'Circuit for converting internal voltage of semiconductor device'19995,914,626'Voltage clamping circuit for semiconductor devices'19995,867,434'Integrated circuit memory devices having dummy memory cells therein for inhibiting memory failures'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2017Patents assigned to SAMSUNG ELECTRONICS CO LTD (60)· patent assignee history
1999–2017Based in Suwon-si, KR· patent location history
1999–2007Based in Kyungki-do, KR· patent location history
2002Based in Kyonggi-do, KR· patent location history
2005–2016Based in Gyeonggi-do, KR· patent location history
2005Based in Youngin, KR· patent location history
2012–2013Patents assigned to KANG SANG SEOK (4)· patent assignee history
2012–2013Patents assigned to KANG SANG-SEOK (4)· patent assignee history
2012–2013Patents assigned to LIM JONG HYOUNG (4)· patent assignee history
2013Patents assigned to BYUN SANG-MAN (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SAMSUNG ELECTRONICS CO LTD601999–2017
KANG SANG SEOKself42012–2013
KANG SANG-SEOKself42012–2013
LIM JONG HYOUNG42012–2013
BYUN SANG-MAN12013
Locations
LocationPatentsSpan
Suwon-si, KR351999–2017
Kyungki-do, KR161999–2007
Gyeonggi-do, KR72005–2016
Youngin, KR12005
Kyonggi-do, KR12002