Inventor
OLEG GOLONZKA
Inventor
US
Overview
Patents· 40 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices24%
H10DInorganic electric semiconductor devices19%
B82YSpecific uses or applications of nanostructures11%
H10NElectric solid-state devices not otherwise provided for10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H10BElectronic memory devices9%
G11CStatic stores8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
H01FMagnets2%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
PatentTitleYear
12,563,779Gate-all-around integrated structures having gate height reduction and dielectric capping material with shoulder portions inside gate stack202612,426,360Wrap-around trench contact structure and methods of fabrication202512,402,349Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact202512,369,392Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates202512,364,002Integrated circuit structures having metal gates with tapered plugs202512,310,060Gate-all-around integrated circuit structures having uniform threshold voltages and tight gate endcap tolerances202512,295,170Fabrication of gate-all-around integrated circuit structures having additive metal gates and gate dielectrics with a dipole layer202512,288,789Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact202512,278,204Pattern decomposition lithography techniques202512,272,737Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact202512,199,143Gate-all-around integrated circuit structures having removed substrate202512,142,566Method of forming stacked trench contacts and structures formed thereby202412,113,068Fabrication of gate-all-around integrated circuit structures having additive metal gates202412,051,698Fabrication of gate-all-around integrated circuit structures having molybdenum nitride metal gates and gate dielectrics with a dipole layer202412,033,894Gate aligned contact and method to fabricate same202411,990,472Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gates202411,908,856Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact202411,837,641Gate-all-around integrated circuit structures having adjacent deep via substrate contacts for sub-fin electrical contact202311,824,116Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact202311,799,009Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact202311,776,959Wrap-around trench contact structure and methods of fabrication202311,770,979Conductive alloy layer in magnetic memory devices and methods of fabrication202311,756,829Gate aligned contact and method to fabricate same202311,737,368Magnetic memory devices and methods of fabrication202311,721,630Method of forming stacked trench contacts and structures formed thereby202311,621,395Resistive random-access memory devices and methods of fabrication202311,616,192Magnetic memory devices with a transition metal dopant at an interface of free magnetic layers and methods of fabrication202311,569,370DEPOP using cyclic selective spacer etch202311,502,254Resistive random access memory device and methods of fabrication202211,495,496Gate aligned contact and method to fabricate same202211,489,112Resistive random access memory device and methods of fabrication202211,462,684Retention improvement by high-k encapsulation of RRAM devices202211,437,567Perpendicular spin transfer torque magnetic mechanism202211,430,948Resistive random access memory device with switching multi-layer stack and methods of fabrication202211,430,944Interconnect structures for logic and memory devices and methods of fabrication202211,411,173Perpendicular spin transfer torque devices with improved retention and thermal stability202211,404,630Perpendicular spin transfer torque memory (pSTTM) devices with enhanced stability and method to form same202211,380,838Magnetic memory devices with layered electrodes and methods of fabrication202211,342,499RRAM devices with reduced forming voltage202211,335,639Method of forming stacked trench contacts and structures formed thereby2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2026Patents assigned to INTEL CORP (40)· patent assignee history
2022–2026Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 40 | 2022–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 40 | 2022–2026 |