Inventor
Barnes Cooper
Inventor
Tigard, OR, US
Overview
Patents· 90 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing51%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use33%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications7%
H04LTransmission of digital information, e.g. telegraphic communication3%
H04WWireless communication networks3%
G06TImage data processing or generation, in general1%
G01KMeasuring temperature1%
G05BControl or regulating systems in general1%
G05DSystems for controlling or regulating non-electric variables1%
G09GArrangements or circuits for control of indicating devices using static means to present variable information1%
PatentTitleYear
11,132,046Power governance of processing unit202111,093,020Flexible multiport USB type-C power management202110,856,102Sharing of environmental data for client device usage202010,761,585Techniques and system for managing activity in multicomponent platform202010,761,579Supercapacitor-based power supply protection for multi-node systems202010,678,199Systems, methods and devices for standby power entry without latency tolerance information202010,642,651Systems, methods and devices for standby power savings202010,571,992Electronic device having a controller to enter a low power mode202010,564,986Methods and apparatus to suspend and resume computing systems202010,481,661Power supply interface light load signal201910,397,733Sharing of environmental data for client device usage201910,345,889Forcing a processor into a low power state201910,317,974Power supply unit (PSU) switching201910,182,398Downstream device service latency reporting for power management201910,114,441Techniques and system for managing activity in multicomponent platform20189,934,047Techniques for switching between operating systems20189,874,922Performing dynamic power control of platform devices20189,838,967Downstream device service latency reporting for power management20179,766,673'Supercapacitor-based power supply protection for multi-node systems'20179,766,675'Methods and apparatuses to provide power in idle states'20179,760,158'Forcing a processor into a low power state'20179,696,785'Electronic device having a controller to enter a low power mode'20179,541,987'Generic host-based controller latency method and appartus'20179,541,983'Controlling reduced power states using platform latency tolerance'20179,507,402'Monitoring transaction requests using a policy engine within a storage drive driver to change power capability and latency settings for a storage drive'20169,494,998'Rescheduling workloads to enforce and maintain a duty cycle'20169,459,684'Idle duration reporting for power management'20169,442,558'Techniques and system for managing activity in multicomponent platform'20169,436,251'Fast platform hibernation and resumption of computing systems'20169,354,679'System and method for causing reduced power consumption associated with thermal remediation'20169,213,393'Power management of low power link states'20159,195,292'Controlling reduced power states using platform latency tolerance'20159,158,357'System and method for conveying service latency requirements for devices connected to low power input/output sub-systems'20159,052,893'Various methods and apparatuses for power states in a controller'20159,032,139'Memory allocation for fast platform hibernation and resumption of computing systems'20158,874,947'Method and apparatus of power management of processor'20148,738,950'Power management of electronic devices utilizing transitions between link states'20148,631,257'Platform power management based on latency guidance'20148,607,075'Idle duration reporting for power management'20138,601,296'Downstream device service latency reporting for power management'20138,595,522'Monitoring transaction requests using a policy engine within a storage drive driver to change power capability and latency settings for a storage drive'20138,458,498'Method and apparatus of power management of processor'20138,341,445'Power management of electronic devices using transitions between link states based on device activity'20128,332,675'Latency based platform coordination'20128,296,553'Method and system to enable fast platform restart'20128,176,341'Platform power management based on latency guidance'20127,984,314'Power management of low power link states'20117,971,081'System and method for fast platform hibernate and resume'20117,930,564'System and method for controlling processor low power states'20117,878,016'Device and method for on-die temperature measurement'20117,818,496'Processor system management mode caching'20107,694,164'Operating system-independent method and system of determining CPU utilization'20107,689,838'Method and apparatus for providing for detecting processor state transitions'20107,631,199'Various methods and apparatuses for power states in a controller'20097,606,962'Deferring peripheral traffic with sideband control'20097,598,959'Display controller'20097,596,464'Determining the thermal influence of components within a system and usage of a matrix for power and thermal management'20097,596,709'CPU power management based on utilization with lowest performance mode at the mid-utilization range'20097,546,409'Deferring peripheral traffic with sideband control'20097,493,435'Optimization of SMI handling and initialization'20097,472,289'Audio noise mitigation for power state transitions'20087,430,673'Power management system for computing platform'20087,363,411'Efficient system management synchronization and memory allocation'20087,281,074'Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notifications'20077,219,241'Method for managing virtual and actual performance states of logical processors in a multithreaded processor using system management mode'20077,181,357'Method and apparatus to calibrate thermometer'20077,152,169'Method for providing power management on multi-threaded processor by using SMM mode to place a physical processor into lower power state'20067,145,481'Method and apparatus for trusted keyboard scanning'20067,100,037'Method for reducing BIOS resume time from a sleeping state'20067,089,430'Managing multiple processor performance states'20067,082,542'Power management using processor throttling emulation'20067,054,720'Operating system coordinated thermal management'20067,032,116'Thermal management for computer systems running legacy or thermal management operating systems'20067,027,057'Entering and exiting power managed states without disrupting accelerated graphics port transactions'20066,829,713'CPU power management based on utilization with lowest performance mode at the mid-utilization range'20046,823,516'System and method for dynamically adjusting to CPU performance changes'20046,823,240'Operating system coordinated thermal management'20046,792,491'Invoking ACPI source language code from interrupt handler'20046,772,366'Method and apparatus for detecting AC removal'20046,738,068'Entering and exiting power managed states without disrupting accelerated graphics port transactions'20046,711,526'Operating system-independent method and system of determining CPU utilization'20046,701,272'Method and apparatus for optimizing thermal solutions'20046,535,798'Thermal management in a system'20036,457,135'System and method for managing a plurality of processor performance states'20026,446,153'Shared embedded microcontroller interface'20026,442,700'Thermal control within systems having multiple CPU performance states'20026,317,827'Method and apparatus for fault tolerant flash upgrading'20016,182,238'Fault tolerant task dispatching'20015,838,982'Power switch method and apparatus for preventing a failure in the power controller'19985,760,636'Adjusting clock frequency and voltage supplied to a processor in a computer system'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2021Patents assigned to INTEL CORP (89)· patent assignee history
1998–2021Based in Aloha, OR, US· patent location history
2001–2011Based in Beaverton, OR, US· patent location history
2002–2021Based in Hillsboro, OR, US· patent location history
2007–2020Based in Tigard, OR, US· patent location history
2012–2016Patents assigned to COOPER BARNES (13)· patent assignee history
2012–2014Patents assigned to JEYASEELAN JAYA L (7)· patent assignee history
2012–2014Patents assigned to GOUGH ROBERT E (4)· patent assignee history
2012–2016Patents assigned to SIDDIQI FARAZ A (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 89 | 1998–2021 |
| COOPER BARNESself | 13 | 2012–2016 |
| JEYASEELAN JAYA L | 7 | 2012–2014 |
| GOUGH ROBERT E | 4 | 2012–2014 |
| SIDDIQI FARAZ A | 4 | 2012–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tigard, OR, US | 53 | 2007–2020 |
| Beaverton, OR, US | 24 | 2001–2011 |
| Aloha, OR, US | 9 | 1998–2021 |
| Hillsboro, OR, US | 4 | 2002–2021 |