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Inventor

Gracieli Posser

Inventor
Austin, TX, US

Overview

11→
Patents
2017–2021
Patent span
Physics
Primary field (CPC G)

Patents· 11 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing100%
PatentTitleYear
10,997,352Routing congestion based on layer-assigned net and placement blockage202110,963,617Modifying route topology to fix clock tree violations202110,885,257Routing congestion based on via spacing and pin density202110,685,164Circuit design routing based on parallel run length rules202010,579,767Systems and methods for routing a clock net with multiple layer ranges202010,460,063Integrated circuit routing based on enhanced topology201910,460,065Routing topology generation using spine-like tree structure201910,460,066Routing framework to resolve single-entry constraint violations for integrated circuit designs201910,460,064Partition-aware grid graph based hierarchical global routing201910,289,792Systems and methods for clustering pins for power20199,665,680'Cell-level signal electromigration'2017

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2017Patents assigned to JAIN PALKESH (1)· patent assignee history
2017Patents assigned to POSSER GRACIELI (1)· patent assignee history
2017Patents assigned to REIS RICARDO (1)· patent assignee history
2017Patents assigned to UNIV MINNESOTA (1)· patent assignee history
2017Based in Porto Alegre, BR· patent location history
2019–2021Patents assigned to CADENCE DESIGN SYSTEMS INC (10)· patent assignee history
2019–2021Based in Austin, TX, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
CADENCE DESIGN SYSTEMS INC102019–2021
JAIN PALKESH12017
POSSER GRACIELIself12017
REIS RICARDO12017
UNIV MINNESOTA12017
Locations
LocationPatentsSpan
Austin, Texas, US102019–2021
Porto Alegre, BR12017