Inventor

Krishnasawamy Nagaraj

Inventor
Plano, TX, US

Overview

24→
Patents
1996–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Mprimary
H03MCoding24%
G01RMeasuring electric variables12%
G11CStatic stores12%
H03KPulse technique12%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses12%
G06GAnalogue computers6%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner6%
H03FAmplifiers6%
G01HMeasurement of mechanical vibrations or ultrasonic, sonic or infrasonic waves3%
H03DDemodulation or transference of modulation from one carrier to another3%
PatentTitleYear
11,105,676Piezo-electric sensor reset202110,466,286Capacitive sensing201910,422,822Capacitive sensing201910,060,959Capacitive sensing20189,846,185Capacitive sensing20179,742,416'IC phase detector with re-timed reference clock controlling switches'20179,520,881'Systems and methods for tuning an oscillator frequency'20168,536,910'System and method for reducing power consumption in a phased-locked loop circuit'20138,451,159'Pipelined ADC with a VCO-based stage'20138,395,538'High speed resistor-DAC for SAR DAC'20138,280,331'System and method for tuning FM synthesizer'20128,022,778'Low phase noise frequency synthesizer'20116,646,584'Circuit design technique for increasing the bandwidth of sample-and-hold circuits in flash ADCs'20036,642,752'Broadband sample and hold circuit'20036,624,698'Low-voltage, broadband operational amplifier'20036,606,042'True background calibration of pipelined analog digital converters'20036,597,302'System for increasing the bandwidth of sample-and-hold circuits in flash ADCs'20036,541,952'On-line cancellation of sampling mismatch in interleaved sample-and-hold circuits'20036,529,070'Low-voltage, broadband operational amplifier'20036,420,983'On-line offset cancellation in flash A/D with interpolating comparator array'20026,329,942'Parallel latch for high speed comparator using two modes of operation'20016,052,000'MOS sample and hold circuit'20006,032,171'Fir filter architecture with precise timing acquisition'20005,532,629'Bipolar track and hold circuit'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2021Patents assigned to TEXAS INSTRUMENTS INC (24)· patent assignee history
1996Based in Wescosville, PA, US· patent location history
2000–2003Based in Somerville, NJ, US· patent location history
2003Based in Hillsborough, NJ, US· patent location history
2011–2021Based in Plano, TX, US· patent location history
2012–2017Patents assigned to NAGARAJ KRISHNASAWAMY (5)· patent assignee history
2013Patents assigned to DAS ABHIJIT KURMAR (1)· patent assignee history
2013Patents assigned to GUPTA AMIT K (1)· patent assignee history
2013Patents assigned to KUMAR AJAY (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TEXAS INSTRUMENTS INC241996–2021
NAGARAJ KRISHNASAWAMYself52012–2017
DAS ABHIJIT KURMAR12013
GUPTA AMIT K12013
KUMAR AJAY12013
Locations
LocationPatentsSpan
Plano, Texas, US122011–2021
Somerville, New Jersey, US92000–2003
Hillsborough, New Jersey, US22003
Wescosville, Pennsylvania, US11996