Inventor
Xue-Mei Gong
Inventor
Austin, TX, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Mprimary
H03MCoding29%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses21%
G06FElectric digital data processing13%
H03KPulse technique8%
H04BTransmission8%
H04LTransmission of digital information, e.g. telegraphic communication8%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner4%
H03HImpedance networks, e.g. resonant circuits4%
H04RLoudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers4%
PatentTitleYear
10,826,507Fractional divider with error correction202010,727,844Reference clock frequency change handling in a phase-locked loop202010,693,475Gradual frequency transition with a frequency step20208,994,420'Higher-order phase noise modulator to reduce spurs and quantization noise'20158,736,476'Modified first-order noise-shaping dynamic-element-matching technique'20148,692,599'Interpolative divider linearity enhancement techniques'20148,671,286'Automatically switching power supply sources for a clock circuit'20147,593,482'Wireless communication system with hardware-based frequency burst detection'20097,400,206'Clock circuit with programmable load capacitors'20087,370,214'Automatically switching power supply sources for a clock circuit'20087,227,484'Startup apparatus and technique for a wireless system that uses time domain isolation'20076,271,780'Gain ranging analog-to-digital converter with error correction'20016,266,002'2nd order noise shaping dynamic element matching for multibit data converters'20016,057,793'Digital decimation filter and method for achieving fractional data rate reduction with minimal hardware or software overhead'20006,011,501'Circuits, systems and methods for processing data in a one-bit format'20005,801,652'Pattern dependent noise reduction in a digital processing circuit utilizing image circuitry'19985,719,572'Digital signal processor with reduced pattern dependent noise'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2001Patents assigned to CIRRUS LOGIC INC (5)· patent assignee history
1998–2020Based in Austin, TX, US· patent location history
2008–2020Patents assigned to SILICON LAB INC (9)· patent assignee history
2014–2015Patents assigned to GONG XUE-MEI (3)· patent assignee history
2014–2015Patents assigned to ELDREDGE ADAM B (2)· patent assignee history
2014Patents assigned to HARA SUSUMU (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON LAB INC | 9 | 2008–2020 |
| CIRRUS LOGIC INC | 5 | 1998–2001 |
| GONG XUE-MEIself | 3 | 2014–2015 |
| ELDREDGE ADAM B | 2 | 2014–2015 |
| HARA SUSUMU | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 17 | 1998–2020 |