Inventor

Kambiz Kaviani

Inventor
Palo Alto, CA, US

Overview

32→
Patents
2006–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 32 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores18%
H04LTransmission of digital information, e.g. telegraphic communication18%
H03KPulse technique17%
G06FElectric digital data processing14%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses8%
B01LChemical or physical laboratory apparatus for general use3%
C12QMeasuring or testing processes involving enzymes, nucleic acids or microorganisms3%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
G01RMeasuring electric variables3%
H01FMagnets3%
PatentTitleYear
10,761,587Optimizing power in a memory device202010,570,449Systems and methods for biological analysis202010,133,338Optimizing power in a memory device20189,809,852'Systems and methods for biological analysis'20179,645,631'Optimizing power in a memory device'20179,606,223'High-accuracy and low-power tracking system for mobile devices'20179,571,034'Electronic circuits using coupled multi-inductors'20179,564,879'Reference voltage generation and calibration for single-ended signaling'20179,515,856'Offset and decision feedback equalization calibration'20169,431,089'Optimizing power in a memory device'20169,432,227'Partial response decision feedback equalizer with selection circuitry having hold state'20169,417,807'Data buffer with strobe-based primary interface and a strobe-less secondary interface'20169,389,637'Methods and systems for recovering intermittent timing-reference signals'20169,344,064'Integrated circuit comprising frequency change detection circuitry'20169,275,784'Electronic circuits using coupled multi-inductors'20169,231,731'Common mode calibration'20169,165,615'Coded differential intersymbol interference reduction'20159,166,838'Reference voltage generation and calibration for single-ended signaling'20159,158,679'Data buffer with a strobe-based primary interface and a strobe-less secondary interface'20159,136,826'Integrated circuit comprising frequency change detection circuitry'20159,071,481'Offset and decision feedback equalization calibration'20159,035,677'High-speed low power stacked transceiver'20158,937,994'Partial response decision feedback equalizer with selection circuitry having hold state'20158,933,729'Stacked receivers'20158,867,595'Reference voltage generation and calibration for single-ended signaling'20148,817,863'Linear equalizer with passive network and embedded level shifter'20148,531,206'High resolution output driver'20138,493,092'Linear equalizer'20138,237,484'Clock distribution circuit'20127,994,838'Clock distribution circuit'20117,489,176'Clock distribution circuit'20097,057,460'Differential amplifier with adaptive biasing and offset cancellation'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2020Patents assigned to RAMBUS INC (29)· patent assignee history
2006–2020Based in Palo Alto, CA, US· patent location history
2012–2017Patents assigned to KAVIANI KAMBIZ (9)· patent assignee history
2013–2015Patents assigned to AMIRKHANY AMIR (3)· patent assignee history
2013–2015Patents assigned to WEI JASON CHIA-JEN (3)· patent assignee history
2013–2017Based in San Francisco, CA, US· patent location history
2014–2017Patents assigned to ARYANFAR FARSHID (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
RAMBUS INC292006–2020
KAVIANI KAMBIZself92012–2017
AMIRKHANY AMIR32013–2015
ARYANFAR FARSHID32014–2017
WEI JASON CHIA-JEN32013–2015
Locations
LocationPatentsSpan
Palo Alto, California, US292006–2020
San Francisco, California, US32013–2017