Inventor
Yaping Zhou
Inventor
Austin, TX, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
H05KPrinted circuits13%
Y10TTechnical subjects covered by former us classification13%
H01FMagnets11%
H01LSemiconductor devices8%
H04LTransmission of digital information, e.g. telegraphic communication8%
G01RMeasuring electric variables3%
H02JElectric power networks3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
H03HImpedance networks, e.g. resonant circuits3%
PatentTitleYear
10,685,925Resistance and capacitance balancing systems and methods202010,600,730Cross talk reduction differential cross over routing systems and methods20209,843,511'Method and apparatus for selecting path from paths between label edge routers'20179,831,198Inductors for integrated voltage regulators20179,306,776'Filtering high speed signals'20169,270,476'Methods and apparatus for network protection'20168,791,372'Reducing impedance discontinuity in packages'20148,742,565'Ball grid array with improved single-ended and differential signal performance'20148,440,917'Method and apparatus to reduce impedance discontinuity in packages'20138,399,981'Ball grid array with improved single-ended and differential signal performance'20138,338,949'System to improve coreless package connections'20128,338,948'Ball grid array with improved single-ended and differential signal performance'20128,222,739'System to improve coreless package connections'20128,193,800'Voltage controlled on-chip decoupling capacitance to mitigate power supply noise'20127,256,488'Semiconductor package with crossing conductor assembly and method of manufacture'20077,203,608'Impedane measurement of chip, package, and board power supply system using pseudo impulse response'20077,049,694'Semiconductor package with crossing conductor assembly and method of manufacture'20066,998,952'Inductive device including bond wires'20066,992,377'Semiconductor package with crossing conductor assembly and method of manufacture'20066,933,599'Electromagnetic noise shielding in semiconductor packages using caged interconnect structures'2005Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2005–2007Patents assigned to FREESCALE SEMICONDUCTOR INC (5)· patent assignee history
2005–2014Based in Austin, TX, US· patent location history
2007–2014Patents assigned to IBM (9)· patent assignee history
2012–2016Patents assigned to ZHOU YAPING (9)· patent assignee history
2012–2014Patents assigned to HARVEY PAUL M (4)· patent assignee history
2012–2014Based in Sunnyvale, CA, US· patent location history
2016–2020Patents assigned to NVIDIA CORP (4)· patent assignee history
2016–2017Based in Beijing, CN· patent location history
2016–2017Based in San Jose, CA, US· patent location history
2020Based in Santa Clara, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 9 | 2007–2014 |
| ZHOU YAPINGself | 9 | 2012–2016 |
| FREESCALE SEMICONDUCTOR INC | 5 | 2005–2007 |
| HARVEY PAUL M | 4 | 2012–2014 |
| NVIDIA CORP | 4 | 2016–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 11 | 2005–2014 |
| Sunnyvale, California, US | 3 | 2012–2014 |
| Santa Clara, California, US | 2 | 2020 |
| Beijing, CN | 2 | 2016–2017 |
| San Jose, California, US | 2 | 2016–2017 |