Inventor

SHING-YIH SHIH

Inventor

TW

Overview

2021–2025

Patent span

Electricity

Primary field (CPC H)

Patents· 74 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1041%

H01LSemiconductor devices40%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%

H10BElectronic memory devices4%

H10DInorganic electric semiconductor devices2%

G11CStatic stores1%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%

H01FMagnets1%

PatentTitleYear

12,482,775Semiconductor structure2025 12,456,703Semiconductor device structure including a bonding structure2025 12,456,630Method of manufacturing semiconductor structure having heat dissipation structure2025 12,431,410Semiconductor device with polymer liner and method for fabricating the same2025 12,381,167Semiconductor structure having vias with different dimensions2025 12,354,965Semiconductor device with redistribution structure and method for fabricating the same2025 12,347,730Method of manufacturing semiconductor structure having vias with different dimensions2025 12,315,796Method for preparing semiconductor device with composite passivation structure2025 12,315,774Semiconductor structure having heat dissipation structure2025 12,278,190Manufacturing method of semiconductor package structure having interconnections between dies2025 12,272,620Semiconductor structure having elastic member within via2025 12,272,651Semiconductor package structure having interconnections between dies and manufacturing method thereof2025 12,266,564Semiconductor device2025 12,205,912Semiconductor package structure and method for preparing the same2025 12,198,977Manufacturing method of semiconductor structure having elastic member within via2025 12,191,258Semiconductor device having integral alignment marks with decoupling features and method for fabricating the same2025 12,142,596Semiconductor structure and manufacturing method thereof2024 12,100,634Semiconductor device with re-fill layer2024 11,935,816Conductive feature with non-uniform critical dimension and method of manufacturing the same2024 11,935,831Semiconductor device with connecting structure and method for fabricating the same2024 11,901,344Manufacturing method of semiconductor package2024 11,901,334Microelectronic devices including embedded bridge interconnect structures2024 11,876,063Semiconductor package structure and method for preparing the same2024 11,876,079Method for fabricating semiconductor device with recessed pad layer2024 11,798,879Semiconductor device with composite passivation structure and method for preparing the same2023 11,765,882Method for fabricating semiconductor device2023 11,742,242Method for manufacturing through-silicon via with liner2023 11,735,540Apparatuses including dummy dice2023 11,735,499Semiconductor device with protection layers and method for fabricating the same2023 11,728,277Method for manufacturing semiconductor structure having via through bonded wafers2023 11,728,316Method for fabricating semiconductor device with heat dissipation features2023 11,710,693Wafer level package utilizing molded interposer2023 11,705,380Method for fabricating semiconductor device with protection layers2023 11,658,070Method of forming semiconductor structure2023 11,658,063Method for preparing semiconductor device structure with air gap2023 11,646,299Method of manufacturing a semiconductor package including a first sub-package stacked atop a second sub-package2023 11,646,292Method for fabricating semiconductor device with re-fill layer2023 11,640,948Microelectronic devices and apparatuses having a patterned surface structure2023 11,640,945Method of forming a semiconductor structure including forming a buffer structure over a metal layer2023 11,621,341Semiconductor device and method for fabricating the same2023 11,610,833Conductive feature with non-uniform critical dimension and method of manufacturing the same2023 11,605,612Method of manufacturing semiconductor package2023 11,605,596Semiconductor device having through silicon vias2023 11,587,901Semiconductor device with redistribution structure and method for fabricating the same2023 11,574,891Semiconductor device with heat dissipation unit and method for fabricating the same2023 11,521,916Method for fabricating semiconductor device with etch stop layer having greater thickness2022 11,502,025Semiconductor device with etch stop layer having greater thickness and method for fabricating the same2022 11,502,038Semiconductor structure having via through bonded wafers and manufacturing method thereof2022 11,476,200Semiconductor package structure having stacked die structure2022 11,469,173Method of manufacturing a semiconductor structure2022 11,469,210Semiconductor package with multiple coplanar interposers2022 11,462,453Semiconductor device with protection layers and method for fabricating the same2022 11,450,556Semiconductor structure2022 11,355,464Semiconductor device structure with bottle-shaped through silicon via and method for forming the same2022 11,342,333Semiconductor device2022 11,329,028Semiconductor device with recessed pad layer and method for fabricating the same2022 11,322,458Semiconductor structure including a first substrate and a second substrate and a buffer structure in the second substrate2022 11,315,869Semiconductor device with decoupling unit and method for fabricating the same2022 11,315,904Semiconductor assembly and method of manufacturing the same2022 11,309,312Semiconductor device2022 11,309,254Semiconductor device having through silicon vias and method of manufacturing the same2022 11,302,629Semiconductor device with composite passivation structure and method for preparing the same2022 11,302,608Semiconductor device with protection layers and method for fabricating the same2022 11,289,370Liner for through-silicon via2022 11,282,781Semiconductor device and method for fabricating the same2022 11,251,128Semiconductor device structure with air gap for reducing capacitive coupling2022 11,239,217Semiconductor package including a first sub-package stacked atop a second sub-package2022 11,222,811Semiconductor device structure with air gap and method for forming the same2022 11,217,525Semiconductor structure and method of forming the same2022 11,211,287Semiconductor device and method for fabricating the same2021 11,195,823Semiconductor package and manufacturing method thereof2021 11,189,523Semiconductor structure and fabrication method thereof2021 11,189,563Semiconductor structure and manufacturing method thereof2021 11,177,194Semiconductor device with interconnect structure and method for preparing the same2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2025Patents assigned to NANYA TECHNOLOGY CORP (69)· patent assignee history

2021–2025Based in TW· patent location history

2022–2024Patents assigned to MICRON TECHNOLOGY INC (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
NANYA TECHNOLOGY CORP	69	2021–2025
MICRON TECHNOLOGY INC	5	2022–2024

Locations

Location	Patents	Span
TW	74	2021–2025