LexDanaLexDanabeta
Inventor

Kevin X. Zhang

Inventor
Portland, OR, US

Overview

63→
Patents
1997–2020
Patent span
Physics
Primary field (CPC G)

Patents· 63 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores36%
G06FElectric digital data processing10%
H03KPulse technique8%
H10DInorganic electric semiconductor devices7%
H10BElectronic memory devices5%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
A61BDiagnosis4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
A61GTransport, personal conveyances, or accommodation specially adapted for patients or disabled persons3%
B60BVehicle wheels3%
PatentTitleYear
10,878,872Random access memory202010,569,794Stabilizer wheel assembly and methods of use2020D0865827Robot end effector201910,206,749Articulating camera stand201910,106,183Stabilizer wheel assembly and methods of use2018D0809041'Surgical robot end effector'20189,771,092'Stabilizer wheel assembly and methods of use'20179,543,867'Brushless direct current motor and driving apparatus thereof'20179,218,103'3D interface implementation method and system based on the android system'20159,123,724'Methods of forming secured metal gate antifuse structures'20159,013,941'DRAM with pulse sense amp'20158,982,659'Bitline floating during non-access mode for memory arrays'20158,929,895'Apparatus and method for moving WCDMA mobile station in the manner of the least packet loss'20158,618,613'Methods of forming secured metal gate antifuse structures'20138,519,462'6F2 DRAM cell'20138,451,670'Adaptive and dynamic stability enhancement for memories'20138,411,482'Programmable read only memory'20138,406,073'Hierarchical DRAM sensing'20138,395,923'Antifuse programmable memory array'20138,242,831'Tamper resistant fuse design'20127,981,756'Common plate capacitor array connections, and processes of making same'20117,924,596'Area efficient programmable read only memory (PROM) array'20117,657,767'Cache leakage shut-off mechanism'20107,602,663'Fuse cell array with redundancy features'20097,417,913'Fuse cell having adjustable sensing margin'20087,403,426'Memory with dynamically adjustable supply'20087,337,372'Method and apparatus for detecting multi-hit errors in a cache'20087,230,842'Memory cell having p-type pass device'20077,177,176'Six-transistor (6T) static random access memory (SRAM) with dynamically variable p-channel metal oxide semiconductor (PMOS) strength'20077,089,360'Shared cache wordline decoder for redundant and regular addresses'20067,079,426'Dynamic multi-Vcc scheme for SRAM cell stability control'20066,992,405'Dynamic voltage scaling scheme for an on-die voltage differentiator design'20066,982,500'Power-down scheme for an on-die voltage differentiator design'20066,948,079'Method and apparatus for providing supply voltages for a processor'20056,862,207'Static random access memory'20056,862,225'Buffer for a split cache line access'20056,816,554'Communication bus for low voltage swing data signals'20046,778,444'Buffer for a split cache line access'20046,775,181'Biasing technique for a high density SRAM'20046,707,752'Tag design for cache access with redundant-form address'20046,650,171'Low power operation mechanism and method'20036,621,726'Biasing technique for a high density SRAM'20036,622,267'Method and apparatus for detecting multi-hit errors in cache'20036,518,826'Method and apparatus for dynamic leakage control'20036,507,531'Cache column multiplexing using redundant form addresses'20036,483,375'Low power operation mechanism and method'20026,456,121'Sense amplifier for integrated circuits using PMOS transistors'20026,442,089'Multi-level, low voltage swing sensing scheme for high speed memory design'20026,407,589'Device for current sensing in an amplifier with PMOS voltage conversion'20026,330,182'Method for evaluating soft error immunity of CMOS circuits'20016,292,401'Method and apparatus for global bitline multiplexing for a high-speed memory'20016,282,143'Multi-port static random access memory design for column interleaved arrays'20016,255,861'Hybrid low voltage swing sense amplifier'20016,204,698'Robust low voltage swing sense amplifier'20016,198,656'Asymmetric memory cell for single-ended sensing'20016,198,684'Word line decoder for dual-port cache memory'20016,181,608'Dual Vt SRAM cell with bitline leakage control'20016,087,849'Soft error immunity in CMOS circuits with large shared diffusion areas'20006,038,693'Error correction scheme for an integrated L2 cache'20006,026,011'CMOS latch design with soft error immunity'20005,986,923'Method and apparatus for improving read/write stability of a single-port SRAM cell'19995,815,432'Single-ended read, dual-ended write SCRAM cell'19985,694,362'Method and apparatus for high speed comparison'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2015Based in Portland, OR, US· patent location history
2000–2015Patents assigned to INTEL CORP (49)· patent assignee history
2012–2013Patents assigned to CHEN ZHANPING (4)· patent assignee history
2012–2013Patents assigned to ZHANG KEVIN X (4)· patent assignee history
2013–2015Patents assigned to ZHANG KEVIN (5)· patent assignee history
2015–2017Based in Shanghai, CN· patent location history
2015Based in Shenzhen, CN· patent location history
2017–2020Patents assigned to GLOBUS MEDICAL INC (6)· patent assignee history
2017–2020Based in Medford, MA, US· patent location history
2020Based in Hsinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP492000–2015
GLOBUS MEDICAL INC62017–2020
ZHANG KEVINself52013–2015
CHEN ZHANPING42012–2013
ZHANG KEVIN Xself42012–2013
Locations
LocationPatentsSpan
Portland, OR, US511999–2015
Medford, Massachusetts, US62017–2020
Shanghai, CN22015–2017
Hsinchu, TW12020
Shenzhen, CN12015