Inventor
Dimitrios Ziakas
Inventor
Hillsboro, OR, US
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing22%
G11CStatic stores10%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
H05KPrinted circuits8%
G06NComputing arrangements based on specific computational models5%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes5%
H04LTransmission of digital information, e.g. telegraphic communication5%
H04QSelecting5%
H01LSemiconductor devices4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
PatentTitleYear
11,036,642Architectural enhancements for computing systems having artificial intelligence logic disposed locally to memory202110,884,195Techniques to support multiple interconnect protocols for a common set of interconnect connectors202110,719,443Apparatus and method for implementing a multi-level memory hierarchy202010,586,764Semiconductor package with programmable signal routing202010,581,596Technologies for managing errors in a remotely accessible memory pool202010,476,670Technologies for providing remote access to a shared memory pool201910,469,252Technologies for efficiently managing allocation of memory in a shared memory pool201910,331,614Method and apparatus for server platform architectures that enable serviceable nonvolatile memory modules201910,241,912Apparatus and method for implementing a multi-level memory hierarchy201910,211,120Rework grid array interposer with direct power201910,176,108Accessing memory coupled to a target node from an initiator node201910,146,657Initialization trace of a computing device20189,832,876CPU package substrates with removable memory mechanical interfaces20179,600,416'Apparatus and method for implementing a multi-level memory hierarchy'20179,507,534'Home agent multi-level NVM memory architecture'20169,378,133'Autonomous initialization of non-volatile random access memory in a computer system'20169,361,257'Mechanism for facilitating customization of multipurpose interconnect agents at computing devices'20169,317,429'Apparatus and method for implementing a multi-level memory hierarchy over common memory channels'20169,256,493'Memory module architecture'20169,015,388'Controlling access to storage in a computing device'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2021Patents assigned to INTEL CORP (20)· patent assignee history
2015–2021Based in Hillsboro, OR, US· patent location history
2016–2019Patents assigned to ZIAKAS DIMITRIOS (8)· patent assignee history
2016–2019Patents assigned to KUMAR MOHAN J (4)· patent assignee history
2016–2019Patents assigned to COURY BASSAM N (3)· patent assignee history
2016–2019Patents assigned to NACHIMUTHU MURUGASAMY K (3)· patent assignee history
2016Based in Portland, OR, US· patent location history
2019Based in Hillsborough, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 20 | 2015–2021 |
| ZIAKAS DIMITRIOSself | 8 | 2016–2019 |
| KUMAR MOHAN J | 4 | 2016–2019 |
| COURY BASSAM N | 3 | 2016–2019 |
| NACHIMUTHU MURUGASAMY K | 3 | 2016–2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hillsboro, OR, US | 18 | 2015–2021 |
| Hillsborough, California, US | 1 | 2019 |
| Portland, OR, US | 1 | 2016 |